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HC12 & MC9S12C32 By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg, SITS, Pune-41 Email: [email protected] URL: microsig.webs.com

HC12 & MC9S12C32

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HC12 & MC9S12C32. By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg, SITS, Pune-41. Email: [email protected] URL: microsig.webs.com. Contents. Introduction to HC12 family MC9S12C32 features Block Diagram Programming Model Pin outs and Signals System Clock. - PowerPoint PPT Presentation

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Page 1: HC12 & MC9S12C32

HC12 & MC9S12C32

By: Prof. Mahendra B. Salunke

Asst. Prof., Department of Computer Engg,

SITS, Pune-41

Email: [email protected]: microsig.webs.com

Page 2: HC12 & MC9S12C32

Contents• Introduction to HC12 family• MC9S12C32 features• Block Diagram• Programming Model• Pin outs and Signals• System Clock

Page 3: HC12 & MC9S12C32

Introduction to HC12 family

• A high-speed, 16-bit processing unit• Instruction set is a proper superset of the

M68HC11 instruction set• Full 16-bit data paths supports efficient

arithmetic operation and high-speed math execution

• Supports instructions with odd byte counts, including many single-byte instructions. This allows much more efficient use of ROM space.

Page 4: HC12 & MC9S12C32

Introduction to HC12 family Continued…

• An instruction queue • Extensive set of indexed addressing capabilities

– Using the stack pointer as an indexing register in all indexed operations

– Using the program counter as an indexing register in all but auto increment/decrement mode

– Accumulator offsets using A, B, or D accumulators

– Automatic index predecrement, preincrement, postdecrement, and postincrement (by –8 to +8)

Page 5: HC12 & MC9S12C32

MC9S12C32 features

• 16-bit HCS12 core• Wake-up interrupt inputs• Memory: 2KiB RAM and 32KiB EEPROM• Analog-to-digital converters• One 1Mbps, CAN 2.0• Timer module (TIM)• PWM module• One asynchronous serial communications

interface (SCI)• One synchronous serial peripheral interface (SPI)

Page 6: HC12 & MC9S12C32

MC9S12C32 features

• Clock reset generator module• Operating frequency: 32MHz equivalent to

16MHz bus speed for single chip• Internal 2.5V regulator• 48-pin LQFP, 52-pin LQFP, or 80-pin QFP

package• Development support:

– Single-wire background debug mode (BDM)– On-chip hardware breakpoints– Enhanced DBG12 debug features

Page 7: HC12 & MC9S12C32

Block Diagram

Page 8: HC12 & MC9S12C32

Programming Model

Page 9: HC12 & MC9S12C32

Condition Code Register• Five status indicators

– Half carry (H)– Negative (N)– Zero (Z)– Overflow (V)– Carry/borrow (C)

• Two interrupt masking bits– X Mask Bit– I Mask Bit

• STOP instruction control bit:– Clearing the S bit enables the STOP instruction

Page 10: HC12 & MC9S12C32

Pin outs

Page 11: HC12 & MC9S12C32

Pin outs

Page 12: HC12 & MC9S12C32

Pin outs

Page 13: HC12 & MC9S12C32

Signals

Page 14: HC12 & MC9S12C32

Signals

Page 15: HC12 & MC9S12C32

Signals

Page 16: HC12 & MC9S12C32

System Clock

Page 17: HC12 & MC9S12C32

Contact Details:Email: [email protected]: microsig.webs.com