2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (OTIS)

Oxide-based RRAM Models for Circuit Designers: A Comparative Analysis

Basma Hajri, Mohammad M. Mansour and Ali Chehab lElectrical and Computer Engineering department

American University of Beirut Beirut 11072020, Lebanon

e-mail: {bh24.mmansour.chehab}@aub.edu.lb

Abstract-Recently, Oxide-based random access memory

devices (OxRAM) have shown the potential to outperform non­

volatile memories due to their high scalability, high-speed, high­

density, and low-energy operation. A critical requirement for

using OxRAM at circuit level is a predictive model for device

behavior that can be used in simulations, as well as a guide for

circuit designers. The proper choice of the memory device model

leads to a better understanding of the memory cell behavior, and

also to a better exploitation of its unique properties in novel

systems. This work is intended to help designers decide on the

most appropriate memory cell model for circuit design. We

present a comparative study of the different major existing

OxRAM models tested within the same simulation environment.

Keywords- Oxide-based resistive random access memory

(OxRAM), memristor models, models comparison, models

assessment, simulation.

I. INTRODUCTION

The end of lithographic scaling of conventional memories technologies such as SRAM, DRAM, and NAND flash has been a popular call for the past few years, with many touting the emergence of new memory types including spin-torque­transfer random access memory (STT-RAM), phase-change memory (PCM), and resistive random access memory (ReRAM). Recently, ReRAM devices received considerable attention in light of their fast programming and high scalability. In its simplest form, a resistive memory element relies on a Metal/Insulator/Metal (MIM) stack offering a resistive switch. This concept is also at the base of the behavior of the so called memristor devices discovered by Chua [I]. A critical requirement for using Oxide-based Resistive Random Access Memories (OxRAM) in circuits is a predictive model for the device behavior that can be used in simulations and to guide designs. An appropriate choice of the model will not only lead to a better understanding of the memory cell behavior, but will also result in a better exploitation of its unique properties in novel systems and architectures combining data storage and data processing in the same physical location. The motivation of this work is to help designers decide on the most appropriate memory cell model in different applications. This paper presents a comparative study and analysis of the different major existing OxRAM models tested within the same simulation environment. The different ReRAM models used in

978-1-5090-6377-2/17/$31.00 ©2017 IEEE

Hassen Aziza IM2NP, UMR CNRS 7334, Aix-Marseille Universite

38 rue 10liot Curie, F-13451 Marseille Cedex 20, France

e-mail: hassen.aziza@univ-amu.fr

this study are the Linear Ion Drift Model [2], the non-Linear Ion Drift Model [3], the Simmons Tunnel Barrier Model [4], the TEAM Model [5], the VTEAM model [6], the Stanford model [7], the SPICE model [8] and the IM2NP model [9].

An overview of Ox RAM technology is presented in Section II. Previously published OxRAM device models are reviewed in Section III. Simulation results of the different models are presented in Section IV. In Section V, a comparative analysis of the different models is performed. Concluding remarks are developed in Section VI.

II. OxRAM TECHNOLOGY

In Resistive RAM the data is stored as two (or multiple) resistance states of the resistive switching device. In working conditions, after an initial electroforming process, the OxRAM element may be reversibly switched between RESET (high resistance) and SET states (low resistance). Electroforming stage corresponds to a voltage-induced resistance switching from an initial very high resistance state (virgin state) to a conductive state. In the case of bipolar switching, bipolar voltage sweeps are required to switch the memory element; see Fig. 1. Resistive switching in an OxRAM element corresponds to an abrupt change between a High Resistance State (HRS or OFF state) and a Low Resistance State (LRS or ON state). This resistance change is achieved by applying specific voltage to the structure (i.e. V SET and VRES). Based on the memory cell hysteresis presented in Fig. 1, in a first approximation, four OxRAM critical reliability parameters can be considered: VSET, VRES, RHRS and RLRS. From a design point of view, these parameters are of prime importance as VSET and VRES are the programming thresholds and RHRS/RLRS ratio guaranties the memory functionality.

Several other parameters play an important role at the design level. One of the most important is the maximum current during switching (namely 10FF and ION). To allow a low power and reliable SET and RESET operations, a 1 Tl R memory cell was introduced (one MOS transistor in series with one resistor) [10]. In this configuration, the MOS transistor compliance allows the control of the maximum available current during transitions. In terms of performance, the programming speed, which is the time required to SET (T SET) or RESET (T RES) the

resistive device, is one of the most critical parameters [11]. Table I summarizes the main OxRAM cell parameters.

Fig. I. Bipolar Resistive RAM I-V typical hysteresis

TABLE!. OxRAM CELL PARAMETERS

Parameter Description RON low state resistance ROFF high state resistance ION max current during the SET operation IOFF max current during the RESET operation VSET required voltage to SET the memory cell VRES required voltage to RESET the memory cell TSET required time to SET the memory cell TRES required time to RESET the memory cell

Although OxRAM-based devices have shown promlsmg properties, some challenges remain, among which the device variability (or reproducibility) is the main one. Therefore, the impact of variability on the OxRAM cell parameters is subject to special attention [12]. Another important marker of OxRAM is the variation of SET/RESET/FORMING thresholds versus temperature [13].

Modeling and accurate characterization of SET/RESET mechanisms remain a major challenge [14-15]. Many details are still under discussion such as the origin of the nonlinear switching kinetics. In memory devices relying on a resistance change, complex physical mechanisms are responsible for the reversible switching of the electrical conductivity between high and low resistance states. The resistivity change is generally attributed to the formation and dissolution of conductive paths between metallic electrodes. Various mechanisms may explain the resistance change (oxygen vacancy migration, oxidation­reduction processes, thermal diffusion, etc). OxRAM models exploit the different resistance change mechanisms to evaluate the impact of external stimulus on the cell parameters during programming operations [16]. Moreover, OxRAM models must allow an implementation into electrical simulators to assess cell performances at the circuit level.

III. GENERAL OVERVIEW OF THE STUDIED MODELS

A. Linear Ion Drift Model

This is the first physical model of memristor developed by R.S Willliams in HP labs [2]. As shown in Fig. 2, the width D of this model is divided into two regions. One region with width w is doped (with positive ions of oxygen, typically Ti02) and has low resistance and is therefore more conductive; and another region is undoped. It is assumed that memristor have Ohmic conductance, uniform field and average ion mobility.

Fig. 2. Linear Ion Drift Model

B. Non-Linear Ion Drift Model

Fabricated memristor devices exhibit high non-linearity behavior as depicted by experiments [3]. This lead to the development of another memristor model, the nonlinear ion drift model. The non-linearity of the device is voltage dependent; a nonlinear dependence between the voltage and the internal state derivative is assumed. By using physically reasonable parameters, this model properly describes both the static electric conduction as well as the switching dynamic behaviors and provides a good fit to the experimental data. The major application of this memristor model is in logic gates.

C. Simmons Tunnel Barrier Model

Pickett et al. proposed a more accurate physical model of memristor in [4]. In this model, instead of two resistors in series, as in HP's model, a resistor is in series with an electron tunnel barrier as shown in Fig. 3. The model exhibits nonlinear and asymmetric switching characteristics. The width of Simmons tunnel barrier [17] is the state variable x. So, derivative of x can be interpreted as oxygen vacancy drift velocity.

Fig. 3. (a) Physical memristor structure based on the Simmons tunnel barrier model. (b) Model parameters [4]

D. ThrEshold Adaptive Memristor model (TEAM)

The TEAM model, presented by Kvatinsky et al. [5] is a simple and general model. It represents the same physical model as the Simmons tunnel barrier model but with simpler mathematical functions. Two simplified assumptions are introduced. First, below a certain threshold the state variable does not change and second, instead of exponential dependence, there is a polynomial dependence involved between the memristor current and the internal state drift derivative. These assumptions are applied to support simple analysis and computational efficiency.

E. Voltage ThrEshold Adaptive Memristor model

(VTEAM)

The VTEAM model [6] is similar to the TEAM model [5], it is based on an expression of the derivative of the internal state variable with a threshold voltage rather than a threshold current.

F. Stanford model

The Stanford RRAM Model is a SPICE-compatible compact model which describes switching performance for bipolar metal oxide RRAM [7]. In principle, this model has no limitations on the size of the RRAM cell. The complex process of ion and vacancy migration was simplified into the growth of a single dominant filament that preserved the essential switching physics. The size of the tunneling gap (g), which is the distance between the tip of the filament and the opposite electrode, is the primary variable determining the device resistance. The current conduction is exponentially dependent on the tunneling gap distance. This distance is found by calculating the growth of the gap, taking into consideration the electric field, temperature-enhanced oxygen ion migration, and local temperature due to Joule heating. In addition, stochastic and temperature-dependent filament movement (og) is also included.

Fig. 4. Stanford-PKU RRAM model illustration.

G. SPICE model

The SPICE model presented in [8] is the model of a popular voltage-controlled memristive system specified by five different parameters for PSPICE (Fig.5 a). The memristive device functionality is organized as a subcircuit consisting of a behavioral resistor R, current source B and capacitor C. The voltage across the capacitor (at the node x) defines the resistance of R.

H. IM2NP OxRAM model

Oxide based Resistive IM2NP model is a compact model well suited to simultaneously describing SET and RESET

operations in bipolar resistive switching memories based on Hf02-based memory devise. By gathering local electrochemical reactions and a thermal mechanism in a single master equation, the model takes into consideration the creation as well as the destruction of conductive filaments. The simulation results satisfactorily match quasi-static and dynamic experimental data published in the literature on resistive switching devices [9]. The model approach relies on electric field-induced creation/destruction of Conductive Filament (CF).

Fig. 5. Schematic of the SPICE model

Fig. 6. OxRAM IM2NP model specifications

IV. SIMULATION RESULTS

In order to compare the different models discussed in section II, a unified simulation environment under Cadence is created. Each model is simulated as a single memristor cell (1 R configuration shown in Fig.7).

Fig. 7. I R memory cell simulation

The Linear Ion Drift Model, Non-Linear Ion Drift Model, Simmons Tunnel Barrier Model, TEAM Model, VTEAM and Stanford models are implemented in Veri log-A within the same code [\8-19]. IM2NP OxRAM cell model IS

implemented in C code and interfaced with ELDO simulator. The PSPICE netlist of the SPICE model [8] is converted into HSPICE netlist for simulations. In the 1 R configuration, the top and bottom electrodes are connected to a sine wave of

2MHz frequency and 1.8V peak-to-peak. The linear I-V relationship of the different models is shown in Fig. 9 (a-h).

V. MODELS COMPARISON

All models are simulated under the same initial conditions and then compared to the experimental data extracted from [20]. The selected reference is alO-nm-thick memory device, which consist of TiN/Ti/HfOx/TiN stacked structure with a 3 nm HfOx layer thickness; tested under very high frequency input voltage (ranging from 1.8V to 1.8V). [20] is selected as reference since it matches best our simulation initial conditions. Table II includes the measured parameters of all the simulated models of a single cell (I R) configuration.

TABLE II MEASURED PARAMETERS OF DIFFERENT SIMULATED MODELS COMPARED

TO EXPERIMENTAL DATA [20]

Extracted Parameters

Model SET RESET Name RON VSET ION TSET ROFF VRES IOFF TRES (KO) (V) (mA) (ns) (KO) (V) (mA) (ns)

Linear 0.05 1.78 0.389 42 1 1.78 0.378 51 r21 Non 69 1.69 0.015 83.6 489 1.79 0.003 81.57 linear [3 Simmons 0.05 1.69 1.68 80 0.63 0.15 2.827 0.0016 [4] TEAM 0.05 1.80 1.79 0.66 1 0.13 2.6 0.0002 [5] VTEAM 0.05 0.196 1.127 0.44 1 0.98 17.62 0.0011 [6] Stanford 3 1.77 0.588 2.87 368 1.15 0.244 OAO [7] SPICE 0.048 0.95 21 4.53 1.01 0.95 16 4.52 r81 1M2NP 5 1.79 0.30 9 09 803 1.75 0.21 16.58 [9] ExperllTI ental 1 0.8 0.5 10 10 1 0.89 10 data [20]

According to the simulation results presented in Table II, we

performed a ranking of the models based on the number of

parameters that match the experimental data [20]. The weights

of each parameter is determined regarding its importance and

impact at a design level; in decreasing order VSET/VRES,

ION/I OFF, the resistance ratio (ROFF/RoN) and T sn/T RES.

10 8

6

4 2

0 �

'J.,(;oo� 1<,.0' 7>(;00 . �

�

Fig. 8. Models ranking based on number of parameters that match the experimental data [20].

Fig. 9.(a-h) Simulated I-V characteristic of the different models.

In order to perform a fair comparison between the different models, we defined a set of metrics that include: • The type of switching (unipolar or bipolar), checked by

applying first a unique positive voltage then a symmetric voltage.

• Complexity, considered as complex model if the equations use hyperbolic sine and exponents rather than polynomials. This metric is determined from the equations of the model and double checked by measuring the simulation runtime of the different models.

• Compatibility with the actual physical switching mechanism (creation and destruction of conductive filaments), checked from the equations of the model.

• Genericity, allowing the model to be adapted to different memristor technologies.

• Linearity checked from the simulated I-V characteristic of the model.

• Symmetry, checked from the simulated I-V characteristic of the model.

• Voltage controlled or current controlled otherwise. • Hard set/soft reset, presented in the literature for actual

memristive devices as the ratio between reset and set times is several orders of magnitude [21], a high ratio means a hard set and a soft reset. This metric is checked from the I-V characteristic and time parameters measured in table II.

• Electroforming, a voltage higher than the normal operation should applied to the device to construct an initial filament between top and bottom electrodes. An explicit electroforming equation should be provided in the model description.

• Support for high programming signals frequencies. A model should support a wide range of working frequencies to make possible the simulation of novel fabricated devices which present very fast switching times [22]. For each model a frequency sweep is performed in order to check whether it supports high frequencies or not.

• Existence of a threshold: physical memristor devices demonstrate a threshold voltage where hysteresis is not seen unless the voltage across the memristor exceeds the threshold [23].

• Applied voltage level dependency. A simulation is performed using a sweep on the amplitude of the applied voltage to confirm this dependency.

• Timing dependency. The same simulation is performed using a square signal by varying the pulse width in order to check if the duration of the applied voltage affects the model parameters.

• Temperature dependency. A temperature sweep is applied in order to check if the temperature affects the model parameters.

• Variability dependency [24]. It is explicitly discussed in the published description of Stanford [7] and IM2NP [8] models only. A simulation is performed by changing the variability parameter to check this dependency.

The summery of the comparison is listed in Table III.

Linear [2] and nonlinear [3] models are simple and intuitive based on the same assumption of two resistors is series; yet they present the lowest accuracy compared to other models [22] and they are not generic. The Simmons tunnel barrier model [4] is known to be the most accurate physical model [25] however, like the first two models, it is not generic it fits only a specific memristor device Ti02 and that's why the error between our experimental reference (HfOx based) [20] and this model is high. This model is also complicated, without an explicit relationship between current and voltage, and computational inefficient. Moreover models [2], [3] and [4] do not contain any threshold which means that their resistance varies for any voltage or current value. TEAM [5] and VTEAM [6] models are simpler versions of Simmons model, generic, more computational efficient and include threshold current and threshold voltage respectively however they are not physical models. The SPICE model [8] is a simple model; it fits all the experimental parameters [20] except the current since the current voltage relationship is not based on physics. The model doesn't match the actual memristive behavior and its state variable has no physical explanation. Stanford [7] and IM2NP [9] are two physics-based compact models for bipolar OxRAM memristive devices; they are the only models to take into consideration the temperature effect the timing effect and variability that are observed in many actual OxRAM cells and have an impact on the performance of the memory.

VI. CONCLUSION

In this paper, a comparative analysis and classification of the major existing OxRAM device models based on different types of simulation has been presented. This analysis has been summarized in a table that can be used by the designers as a reference to choose the most appropriate model for their different applications. This study should be valuable also to the modelling community by showing the weak points of each model and hence highlights the areas of improvement. Further investigation is still needed in order to perform a complete comparative analysis especially: checking the models behavior in 1 TIR OxRAM configuration and validating the comparison at circuit level using an OxRAM memory array.

REFERENCES

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TABLE III

COMPARISON OF THE DIFFERENT SIMULATED MODELS MODEL NAME LINEAR NONLINEAR SIMMONS TEAM VTEAM STANFORD SPICE IM2NP

MODEL[2] MODEL 13] MODEL 14] MODEL 15] MODEL 16] MODEL 17] MODEL IS] MODEL 19]

BIPOLAR

SWITCHING V V V V V V V V

Low COMPLEXITY V X X V V x V V MATCHING THE ACTUAL

X X V V V V x V MEMRISTlVE BEHAVIOR

GENERICITY X X X V V v(l) V v(l)

LINEAR V X X X X X X X

SYMMETRIC V X X X X X V (2) X

VOLTAGE CONTROLLED X (J) V X (J) X (1) V V V V

HARD SET X X X V V V V V

SOFT RESET (4) X X X V V x V V

ELECTRO FORMING X X X X X X X V SUPPORT OF HIGH

FREQUENCIES (5) X X V V V V V V

THRESHOLD X X X V V V V V ApPLIED VOLTAGE

LEVEL DEPENDENCY V V V V V V V V

TIMING V V x x x x x X DEPENDENCY

TEMPERA TURE x x x

DEPENDENCY x x V X V

V ARIABILlTY V V x x x x x X DEPENDENCY

(1) fits all oxide based memristor devices (2) it can be asymmetric by changing one fitting parameter alpha

(3) are current controlled devices (4) switching off is slower than switching on; check the shape of 1-V curve (5) starting I MHz.