Principles in Communication Networks

Oct 2004 Principles of Communication Networks

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Principles in Communication Networks

Instractor: Dr. Yuval Shavitt, Office hours: room 303 s/w eng. bldg., Mon 12:00-13:00

Requiresments ( קדם :(דרישות Introduction to computer communications (TAU, Technion, BGU)

Expectations from students: Queueing theory basics Graph theory Good C/C++ programming skills


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Course Syllabus (tentative)

Introduction to switching, router types

Use of Gen. Func.: HOL analysis, TCP analysis.

Matching algorithms and their analysis

CLOS networks: non-blocking theorem, routing algorithms and their analysis

Scheduling algorithms: WFQ, W2FQ, priorities

Distributed algorithms

Event simulators – introduction

Programming tasks: Single queue HOL blocking (cells) iSLIP algorithm (cells &

packets) ….


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Source books

D. Bertsekas and R. Gallager. Data Networks, 2nd Ed., 1992. P-H.

S. Keshav. An Engineering Approach to Computer Networking. 1997. E-W

J.F. Kurose and K.W. Ross. Computer Networking. 2000, E-W.

L. Kleinrock. Queueing Systems, Vol. 1. 1975. Wiley

J.Y.Hui, Switching and Traffic Theory for Integrated Broadband Networks, Kluwer 1990

A.M. Law and W.D. Kelton. Simulation Modeling & Analysis, 2nd Ed., 1991,M-H

Switching S. Keshav, An Engineering Approach to Computer Networks, A-W,

1997

M. Karol, M. Hluchyj, and S. Morgan, "Input Versus Output Queueing on a Space-Division Packet Switch," IEEE Trans. on Communications, 35(12):1347-1356, Dec. 1987.


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What is it all about?

How do we move traffic from one part of the network to another?

Connect end-systems to switches, and switches to each other

Data arriving to an input port of a switch have to be moved to one or more of the output ports


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Outline

switching - general

Packet switching General Type of switches Switch generations Buffer placement

Port mappers

Buffer Placement

Dropping policies


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Types of switching elements

Telephone switches switch samples

Datagram routers switch datagrams

ATM switches switch ATM cells


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Classification

Packet vs. circuit switches packets have headers and samples don’t

Connectionless vs. connection oriented connection oriented switches need a call setup setup is handled in control plane by switch controller connectionless switches deal with self-contained datagrams

Connectionless(router)

Connection-oriented(switching system)

Packetswitch

Internet router ATM switching system

Circuitswitch

Telephone switchingsystem


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Other switching element functions

Participate in routing algorithms to build routing tables

Resolve contention for output trunks scheduling

Admission control to guarantee resources to certain streams


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Requirements

Capacity of switch is the maximum rate at which it can move information, assuming all data paths are simultaneously active

Primary goal: maximize capacity subject to cost and reliability constraints

Circuit switch must reject call if can’t find a path for samples from input to output goal: minimize call blocking

Packet switch must reject a packet if it can’t find a buffer to store it awaiting access to output trunk goal: minimize packet loss

Don’t reorder packets


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Outline

switching - general


Port mappers

Buffer Placement

Dropping policies


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Packet switching

In a circuit switch, path of a sample is determined at time of connection establishment

No need for a sample header--position in frame is enough

In a packet switch, packets carry a destination field

Need to look up destination port on-the-fly

Datagram lookup based on entire destination address

Cell lookup based on VCI

Other than that, very similar


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Blocking in packet switches

Can have both internal and output blocking

Internal no path to output

Output trunk unavailable

Unlike a circuit switch, cannot predict if packets will block (why?)

If packet is blocked, must either buffer or drop it


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Dealing with blocking

Overprovisioning internal links much faster than inputs (speedup)

Buffers at input or output (or both)

Backpressure if switch fabric doesn’t have buffers, prevent packet from entering

until path is available Parallel switch fabrics

increases effective switching capacity


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Repeaters, bridges, routers, and gateways

Repeaters: at physical level

Bridges: at datalink level (based on MAC addresses) (L2) discover attached stations by listening

Routers: at network level (L3) participate in routing protocols

Application level gateways: at application level (L7) treat entire network as a single hop e.g mail gateways and transcoders

Gain functionality at the expense of forwarding speed for best performance, push functionality as low as possible


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Outline

switching - general


Port mappers

Buffer Placement

Dropping policies


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Three generations of packet switches

Different trade-offs between cost and performance

Represent evolution in switching capacity, rather than in technology With same technology, a later generation switch achieves greater

capacity, but at greater cost All three generations are represented in current products


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First generation switch

Most Ethernet switches and cheap packet routers

S/w router, e.g., Linux/FreeBSD boxes

Bottleneck can be CPU, host-adaptor or I/O bus, depending

computer

queues in memory

CPU

linecard linecard linecard


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Second generation switch

Port mapping intelligence in line cards

ATM switch guarantees hit in lookup cache

bus

computer

front end processorsor line cards


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Third generation switches

Bottleneck in second generation switch is the bus (or ring)

Third generation switch provides parallel paths (fabric)

NxNpacketswitchfabric

OLC

OLC

OLC

IN

ILC

ILC

ILC

OUT


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Third generation (contd.)

Features self-routing fabric output buffer is a point of contention

unless we arbitrate access to fabric potential for unlimited scaling, as long as we can resolve contention

for output buffer


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Outline

switching - general

Packet switching General Type of switches Switch generations

Port mappers

Buffer Placement

Dropping policies


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Port mappers

Look up output port based on destination address

Easy for VCI: just use a table

Harder for datagrams: need to find longest prefix match

e.g. packet with address 128.32.1.20 entries: (128.32.*, 3), (128.32.1.*, 4), (128.32.1.20, 2)

A standard solution: trie


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Tries

Some ways to improve performance cache recently used addresses in a CAM move common entries up to a higher level (match longer strings)

root

1032128

54

4(128.54.4.*)

(32.*)(10.*)

32

25(128.32.25.*)

1

120100(128.32.1.100)(128.32.1.120)


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Outline

switching - general

Packet switching General Type of switches Switch generations

Port mappers

Buffer Placement

Dropping policies


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Buffering

All packet switches need buffers to match input rate to service rate or cause heavy packet loses

Where should we place buffers? input output in the fabric


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Input buffering (input queueing)

No speedup in buffers or trunks (unlike output queued switch) Needs arbiter Problem: head of line blocking

with randomly distributed packets, utilization at most 58.6%

buffercontrolqueues

buffercontrolqueues

buffercontrolqueues

arbitrator

NxNswitch outputs

inputs


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head of line blocking – simple upper bound

Assume nxn switch with uniform distribution of destination

Probability for an output port not to be selected is

Capacity is bounded by 1-1/e = 0.63

For 2x2 switch the max capacity is 0.75 (tight bound)

enP

nn

empty

1)

11(


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head of line blocking – alternative calculation

The success probability of an input port selection:

en

nnni

n

inni

n

P

n

n

inin

i

inin

isuc

11

111

111

1

1

1

111

11

11

0

11

0


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Dealing with HOL blocking

Per-output queues at inputs (VOQ)

Arbiter must choose one of the input ports for each output port

How to select?

Parallel Iterated Matching inputs tell arbiter which outputs they are interested in output selects one of the inputs some inputs may get more than one grant, others may get none if >1 grant, input picks one at random, and tells output losing inputs and outputs try again

Used in DEC Autonet 2 switch, McKeown’s iSLIP, and more.


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Output queueing

Don’t suffer from head-of-line blocking

But output buffers need to run much faster than trunk speed

Can reduce some of the cost by using the knockout principle unlikely that all N inputs will have packets for the same output drop extra packets, fairly distributing losses among inputs

inputs outputs

NxNswitchfabric


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Buffered fabric

Buffers in each switch element

Pros Speed up is only as much as fan-in Hardware backpressure reduces buffer requirements

Cons costly (unless using single-chip switches) scheduling is hard


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Buffered crossbar

What happens if packets at two inputs both want to go to same output?

Can defer one at an input buffer

Or, buffer crosspoints


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Hybrid solutions

Buffers at more than one point

Becomes hard to analyze and manage

But common in practice


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Multicasting

Useful to do this in hardware

Assume portmapper knows list of outputs

Incoming packet must be copied to these output ports

Two subproblems generating and distributing copies VCI translation for the copies


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Generating and distributing copies

Either implicit or explicit

Implicit suitable for bus-based, ring-based, crossbar, or broadcast switches multiple outputs enabled after placing packet on shared bus used in Paris and Datapath switches

Explicit need to copy a packet at switch elements use a copy network place # of copies in tag element copies to both outputs and decrements count on one of them collect copies at outputs

Both schemes increase blocking probability


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Outline

switching - general


Port mappers

Buffer Placement

Dropping policies


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Packet dropping

Packets that cannot be served immediately are buffered

Full buffers => packet drop strategy

Packet losses happen almost always from best-effort connections (why?)

Shouldn’t drop packets unless imperative? packet drop wastes resources (why?)


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Classification of drop strategies

1. Degree of aggregation

2. Drop priorities

3. Early or late

4. Drop position


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1. Degree of aggregation

Degree of discrimination in selecting a packet to drop

E.g. in vanilla FIFO, all packets are in the same class

Instead, can classify packets and drop packets selectively

The finer the classification the better the protection


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2. Drop priorities

Drop lower-priority packets first

How to choose? endpoint marks packets regulator marks packets congestion loss priority (CLP) bit in packet header


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CLP bit: pros and cons

Pros if network has spare capacity, all traffic is carried during congestion, load is automatically shed

Cons separating priorities within a single connection is hard what prevents all packets being marked as high priority?


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3. Early vs. late drop

Early drop => drop even if space is available signals endpoints to reduce rate cooperative sources get lower overall delays, uncooperative

sources get severe packet loss Early random drop

drop arriving packet with fixed drop probability if queue length exceeds threshold

intuition: misbehaving sources more likely to send packets and see packet losses


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3. Early vs. late drop: RED

Random early detection (RED) makes three improvements

Metric is moving average of queue lengths small bursts pass through unharmed only affects sustained overloads

Packet drop probability is a function of mean queue length prevents severe reaction to mild overload

Can mark packets instead of dropping them allows sources to detect network state without losses

RED improves performance of a network of cooperating TCP sources

No bias against bursty sources

Controls queue length regardless of endpoint cooperation


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4. Drop position

Can drop a packet from head, tail, or random position in the queue

Tail easy default approach

Head harder lets source detect loss earlier


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4. Drop position (contd.)

Random hardest if no aggregation, hurts hogs most unlikely to make it to real routers

Documents

Principles in Communication Networks