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Lecturer: Prof. Anant Agarwal Textbook: Agarwal and Lang (A&L)
Readings are important!
Handout no. 3 Web site —
http://web.mit.edu/6.002/www/fall00
Assignments —
Homework exercisesLabsQuizzesFinal exam
ADMINISTRIVIA
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Two homework assignments canbe missed (except HW11).
Collaboration policyHomework
You may collaborate withothers, but do your ownwrite-up.
LabYou may work in a team oftwo, but do you own write-up.
Info handout
Reading for today —Chapter 1 of the book
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What is engineering?
What is 6.002 about?
Purposeful use of science
Gainful employment ofMaxwell’s equations
From electrons to digital gatesand op-amps
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Simple amplifier abstraction
Instruction set abstractionPentium, MIPS 6.004
Software systems 6.033Operating systems, Browsers
Filters
Operationalamplifier abstractionabstraction
-
+
Digital abstraction
Programming languages
Java, C++, Matlab 6.001
Combinational logic f
Lumped circuit abstraction
R V C L M S+ –
6 .
0 0
2
Nature as observed in experiments
…0.40.30.20.1 I
…12963V
Physics laws or “abstractions” Maxwell’s
Ohm’sV = R I
abstraction for
tables of data
Clocked digital abstraction
Analog systemcomponents:Modulators,
oscillators,RF amps,power supplies 6.061
Mice, toasters, sonar, stereos, doom, space shuttle6.1706.455
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Consider
Suppose we wish to answer this question:
What is the current through the bulb?
V
I
?
The Big Jumpfrom physics
to EECS
Lumped Circuit Abstraction
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We could do it the Hard Way…
Apply Maxwell’s
Differential form Integral form
Faraday’s
Continuity
Others
t
B E
∂
∂−=×∇
t J
∂
∂−=⋅∇
0
E ε
=⋅∇
t dl E B
∂
∂−=⋅∫
φ
t
qdS J
∂
∂−=⋅∫
0ε
qdS E =⋅∫
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Instead, there is an Easy Way…
First, let us build some insight:
Analogy
I ask you: What is the acceleration?
You quickly ask me: What is the mass?
I tell you: m
You respond:m
F a =
Done!!!
F
a ?
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Instead, there is an Easy Way…
In doing so, you ignored the object’s shape its temperature
its color point of force application
Point-mass discretization
F
a ?
First, let us build some insight:
Analogy
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The Easy Way…
A
B
Replace the bulb with a
discrete resistor for the purpose of calculating the current.
R represents the only property of interestLike with point-mass: replace objects
with their mass m to findm
F a =
and R
V I =
A
B
R
I +
–V
In EE, we do thingsthe easy way…
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The Easy Way…
R represents the only property of interest
and R
V I =
A
B
R
I +
–V
In EE, we do thingsthe easy way…
V I =
relates element v and i R
called element v-i relationship
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R is a lumped element abstraction
for the bulb.
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R is a lumped element abstractionfor the bulb.
Not so fast, though …
are definedfor the element
V I
A
B
black box
AS
BS
I
+
–
V
Although we will take the easy wayusing lumped abstractions for the restof this course, we must make sure (atleast the first time) that ourabstraction is reasonable. In this case,ensuring that
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must be definedfor the element
V I
A
B
black box
AS
BS
I
+
–
V
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V
defined when ABV 0=∂
∂
t
Bφ
outside elementsdl E V AB AB ⋅= ∫
s e e
A & L
Must also be defined.
So let’s assume this too
So
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Lumped circuit abstraction applies when
elements adhere to the lumped matterdiscipline.
Lumped Matter Discipline (LMD)
0=∂
∂
t B
φ outside
0=∂
∂
t
qinside elementsbulb, wire, battery
Or self imposed constraints:
More inChapter 1of A & L
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Lumped element exampleswhose behavior is completelycaptured by their V – I relationship.
Demo only for thesorts ofquestions we
as EEs wouldlike to ask!
Exploding resistor democan’t predict that!
Pickle demo
can’t predict light, smell
Demo
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Replace the differential equationswith simple algebra using lumped
circuit abstraction (LCA).
For example —
What can we say about voltages in a loopunder the lumped matter discipline?
+ –
1 R
2 R
4 R
5 R
3 R
a
b d
c
V
So, what does this buy us?
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What can we say about voltages in a loopunder LMD?
+ –
1 R
2 R
4 R
5 R
3 R
a
b d
c
V
t dl E B
∂∂−=⋅∫
φ under DMD0
Kirchhoff’s Voltage Law (KVL):
The sum of the voltages in a loop is 0.
∫∫∫ =⋅+⋅+⋅bcabca
dl E dl E dl E 0
=+++ bcabca
V V V 0
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What can we say about currents?
Consider
S ca I da I
ba I
a
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What can we say about currents?
S ca I da I
ba I
t
qdS J
S ∂
∂−=⋅∫ under LMD
0
0=++ badaca I I I
Kirchhoff’s Current Law (KCL):
The sum of the currents into a node is 0.
simply conservation of charge
a
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KVL:0
loop
KCL:
node
=∑ j jν
0=∑ j ji
KVL and KCL Summary
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6.002 Fall 2000 Lecture 2
6.002 CIRCUITS ANDELECTRONICS
Basic Circuit Analysis Method(KVL and KCL method)
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6.002 Fall 2000 Lecture 2
0=∂
∂
t
Bφ
0=∂
∂
t
q
Outside elements
Inside elements
Allows us to create the lumped circuitabstraction
wires resistors sources
Review
Lumped Matter Discipline LMD:Constraints we impose on ourselves to simplifyour analysis
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6.002 Fall 2000 Lecture 2
LMD allows us to create thelumped circuit abstraction
Lumped circuit element+
-
v
i
power consumed by element = vi
Review
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6.002 Fall 2000 Lecture 2
KVL:
0
loop
KCL:
node
=∑ j jν
0=∑ j ji
ReviewReview
Maxwell’s equations simplify toalgebraic KVL and KCL under LMD!
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6.002 Fall 2000 Lecture 2
KVL0=++ bcabca vvv
0=++ badaca iii KCLDEMO
1
2 R
4 R
5 R
3 R
a
b d
c
+
–
Review
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6.002 Fall 2000 Lecture 2
Method 1: Basic KVL, KCL method ofCircuit analysis
Goal: Find all element v’s and i’s
write element v-i relationships(from lumped circuit abstraction)
write KCL for all nodeswrite KVL for all loops
1.
2.3.
lots of unknownslots of equationslots of funsolve
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6.002 Fall 2000 Lecture 2
Method 1: Basic KVL, KCL method ofCircuit analysis
For R,
For voltage source,
For current source,
Element Relationships
IRV =
0V V =
0 I I =
3 lumped circuit elements
R
0V
o I
+ –
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6.002 Fall 2000 Lecture 2
KVL, KCL Example
The Demo Circuit
+ –
1 R
2
R
4 R
5 R
3 R
a
b d
c
00 V =ν +
–
1ν +–
5ν
+
–
3ν + –
2ν +
–
4ν +–
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6.002 Fall 2000 Lecture 2
Associated variables discipline
ν
i+
-
Element e
Then power consumed
by element e
iν = is positive
Current is taken to be positive goinginto the positive voltage terminal
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6.002 Fall 2000 Lecture 2
KVL, KCL Example
The Demo Circuit
+ –
1 R
2
R
4 R
5 R
3 R
a
b d
c
00 V =ν +
–
1ν +–
5ν
+
–
3ν + –
1 L
2 L
4 L
3 L2ν
+
–
4ν +–
2i
1i
0i
5i
3i
4i
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6.002 Fall 2000 Lecture 2
Other Analysis MethodsMethod 2— Apply element combination rules
B
C
D
⇔ N R R R +++ 21
⇔1G 2G N G NGGG ++ 21
i
i R
G 1=
⇔+ – + – + – 1
V 2
V 21
V V +
⇔
1 I 2 I 21 I I +
A 1 R 2 R 3 R N R
…
Surprisingly, these rules (along with superposition, which you will learn about later) can solve the circuit on page 8
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6.002 Fall 2000 Lecture 2
Other Analysis MethodsMethod 2— Apply element combination rules
V
I
32
32
R R
R R
+
V
I
32
32
1 R R
R R R R
++=
+ –
V
?= I
1 R
3 R2 R
+ –
+ – R
Example
1 R
R
V I =
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6.002 Fall 2000 Lecture 2
1.
2.
3.
4.
5.
Select reference node ( ground)from which voltages are measured.
Label voltages of remaining nodeswith respect to ground.These are the primary unknowns.
Write KCL for all but the ground
node, substituting device laws andKVL.
Solve for node voltages.
Back solve for branch voltages andcurrents (i.e., the secondary unknowns)
Particular application of KVL, KCL method
Method 3—Node analysis
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6.002 Fall 2000 Lecture 2
Example: Old Faithfulplus current source
0V
1 R
2 R
4 R
5 R
3 R
1 I
0V
+ – 1e
2e
Step 1Step 2
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6.002 Fall 2000 Lecture 2
Example: Old Faithfulplus current source
0)()()( 21321101 =+−+− GeGeeGV eKCL at 1e
0)()()( 152402312 =−+−+− I GeGV eGee
KCL at 2e
for
conveniencewrite
i
i R
G 1=
0V
1 R
2 R
4 R
5 R
3 R
1e
1 I
0V
+ –
2e
Step 3
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6.002 Fall 2000 Lecture 2
Example: Old Faithfulplus current source
0)()()( 21321101 =+−+− GeGeeGV e
KCL at 1e
0)()()( 152402312 =−+−+− I GeGV eGeeKCL at 2l
move constant terms to RHS & collect unknowns
)()()( 10323211 GV GeGGGe =−+++
140543231 )()()( I GV GGGeGe +=+++−
i
i R
G 1=
2 equations, 2 unknowns Solve for e’s(compare units)
0V
1 R
2 R
4 R
5 R
3
1e
1 I
0V
+ –
2e
Step 4
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6.002 Fall 2000 Lecture 2
In matrix form:
⎥
⎦
⎤⎢
⎣
⎡
+=⎥
⎦
⎤⎢
⎣
⎡⎥
⎦
⎤⎢
⎣
⎡
++−
−++
104
01
2
1
5433
3321
I V G
V G
e
e
GGGG
GGGG
conductivitymatrix
unknownnode
voltages
sources
( )( ) 23543321
104
01
3213
3543
2
1
GGGGGGG
I V G
V G
GGGG
GGGG
e
e
−++++
⎥⎦
⎤⎢⎣
⎡
+⎥⎦
⎤⎢⎣
⎡
++
++
=⎥⎦
⎤⎢⎣
⎡
Solve
5G3G4G3G2
3G5G2G4G2G3G2G5G1G4G1G3G1G
1 I 0V 4G3G
0V 1G5G4G3G
1e
++++++++
++++=
( )( ) ( )( )
5343
2
3524232514131
1043210132
GGGGGGGGGGGGGGGGG
I V GGGGV GGe
++++++++
++++=
(same denominator)
Notice: linear in , , no negativesin denominator
0V 1 I
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6.002 Fall 2000 Lecture 2
Solve, given
K 2.8
1
G
G
5
1
=⎭⎬⎫
K 9.3
1
G
G
4
2
=⎭⎬⎫
K 5.1
1G3 =
01 = I
( ) ( ) 23G5G4G3G3G2G1G
1
I
0
V
4
G
3
G
2
G
1
G
0
V
1
G
3
G
2e −+++++
++++
=
15.1
1
9.3
1
2.8
1
3G2G1G =++=++
12.81
9.31
5.11GGG 543 =++=++
0
2
2 V
5.1
11
9.3
115.1
1
2.8
1
e
−
×+×=
02 6.0 V e =
If , thenV V 30 = 02 8.1 V e =
Check out the
DEMO
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6.002 Fall 2000 Lecture 3
6.002 CIRCUITS ANDELECTRONICS
Superposition, Thévenin and Norton
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6.002 Fall 2000 Lecture 3
0=∑loop
iV
Review
Circuit Analysis Methods
Circuit composition rules
Node method – the workhorse of 6.002KCL at nodes using V ’s referencedfrom ground(KVL implicit in “ ”) ji ee − G
KVL: KCL:
0=∑node
i I
VI
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6.002 Fall 2000 Lecture 3
Consider
Linearity
Write node equations –
V I
1 R
2 R
+ –
021
=−+−
I R
e
R
V e
Notice:linear in I V e ,,
VI ,eV No
terms
e
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6.002 Fall 2000 Lecture 3
Consider
Linearity
Write node equations --
Rearrange --
V I
1 R
2 R
+ –
021
=−+−
I R
e
R
V e
I R
V e R R +=⎥⎦
⎤
⎢⎣
⎡
+121
11
e S
conductance
matrix
node
voltages
linear sum
of sources
linear in IV e ,,
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6.002 Fall 2000 Lecture 3
Linearity
or I R R
R RV
R R
Re
21
21
21
2
++
+=
…… +++++= 22112211 I b I bV aV ae
Write node equations --
Rearrange --
021
=−+− I Re
RV e
I
R
V e
R R
+=⎥⎦
⎤⎢⎣
⎡+
121
11
e S
conductance
matrix
node
voltages
linear sum
of sources
linear in IV e ,,
Linear!
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6.002 Fall 2000 Lecture 3
LinearityHomogeneitySuperposition⇒
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6.002 Fall 2000 Lecture 3
LinearityHomogeneitySuperposition
Homogeneity
1 x2
x ... y
1 xα 2 xα yα ...
⇓
⇒
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6.002 Fall 2000 Lecture 3
LinearityHomogeneitySuperposition
Superposition
a x1a x2 a y... ...
b x1b x2 b y
⇒
ba x x 11 +
ba x x 22 + ba y y +
⇓
...
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6.002 Fall 2000 Lecture 3
LinearityHomogeneitySuperposition
Specific superposition example:
1V 0 1 y 02V 2 y
01 +V
20 V + 21 y y +
⇓
⇒
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6.002 Fall 2000 Lecture 3
Method 4: Superposition method
The output of a circuit is
determined by summing theresponses to each sourceacting alone.
i n d e p e n d e n
t s o u rc e s
o n l y
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6.002 Fall 2000 Lecture 3
i
+ –
0=V
+
-
v
i
short
+
-
v
i
0= I
+
-
v
i
open
+
-
v
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6.002 Fall 2000 Lecture 3
Back to the exampleUse superposition method
V I
1 R
2 R+ –
e
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6.002 Fall 2000 Lecture 3
Back to the exampleUse superposition method
V acting alone
V 0= I
2 R
+ –
e
1 R
I acting alone
0=V I
1 R
2 R
e
V R R
ReV
21
2
+=
I R R
R R
e I 21
21
+=
I R R
RV
R R
Reee I V
21
21
21
2
++
+=+=
sum superposition
Voilà !
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6.002 Fall 2000 Lecture 3
saltwater
output showssuperposition
Demo
constant
+ –
sinusoid
+ –
?
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6.002 Fall 2000 Lecture 3
Consider Yet another method…
resistors
nounits
By setting
0,0
==∀
i I nn
0,0
==∀
iV mm
All
0,0
=∀=∀
mm
nn
V I
+ –
mV n I
A r b i t r a r y n e t w o r k N
By superposition Ri I V v n
nnm
mm ++= ∑∑ β α
+
-
v
i
i
resistanceunits
independent of externalexcitation and behaves like avoltage “ ”TH v
alsoindependentof externalexcitement &behaves like
a resistor
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6.002 Fall 2000 Lecture 3
Ori Rvv TH TH +=
As far as the external world is concerned(for the purpose of I-V relation),
“Arbitrary network N” is indistinguishable
from:
i+ –
TH R
TH v
+
-
v
Théveninequivalentnetwork
TH R
TH v open circuit voltageat terminal pair (a.k.a. port)
resistance of network seenfrom port( ’s, ’s set to 0)
mV n I
N
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6.002 Fall 2000 Lecture 3
Method 4:
The Thévenin Method
Replace network N with its Thévenin
equivalent, then solve external network E.
E
Thévenin equivalent
+ –
TH R
TH v
+
-
v
i
E
+ –
+ –
i
+
-
v
N
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6.002 Fall 2000 Lecture 3
Graphically, i Rvv TH TH +=
i
Open circuit( )0≡i
TH vv = OC V
Short circuit( )0≡v TH
TH
R
vi −=
SC I −
v
TH R
1
TH v
SC I −
OC V “ ”
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6.002 Fall 2000 Lecture 3
Method 5:
The Norton Method
in recitation,see text
+ –
+ –
i
+
-
v
Nortonequivalent
TH
TH N
R
V I =
N TH R R = N I
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6.002 Fall 2000 Lecture 3
Summary
… 101100 …
Discretize matterLMD LCA
Physics EE
R, I, V Linear networks
Analysis methods (linear)KVL, KCL, I — VCombination rulesNode methodSuperpositionThéveninNorton
NextNonlinear analysis
Discretize voltage
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6.002 Fall 2000 Lecture 4
6.002 CIRCUITS ANDELECTRONICS
The Digital Abstraction
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6.002 Fall 2000 Lecture 4
Review
Discretize matter by agreeing toobserve the lumped matter discipline
Analysis tool kit: KVL/KCL, node method,superposition, Thévenin, Norton
(remember superposition, Thévenin,Norton apply only for linear circuits)
Lumped Circuit Abstraction
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6.002 Fall 2000 Lecture 4
Discretize value Digital abstraction
Interestingly, we will see shortly that thetools learned in the previous threelectures are sufficient to analyze simpledigital circuits
Reading: Chapter 5 of Agarwal & Lang
Today
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6.002 Fall 2000 Lecture 4
Analog signal processing
But first, why digital?In the past …
By superposition,
The above is an “adder” circuit.
2
21
11
21
20
V R R
RV
R R
RV
+
+
+
=
If ,21 R R =
2
210
V V V +=
1V
1 R
2 R+ –
2V + –
0V
andmight represent the
outputs of two
sensors, for example.
1V 2V
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6.002 Fall 2000 Lecture 4
Noise Problem
… noise hampers our ability to distinguishbetween small differences in value —e.g. between 3.1V and 3.2V.
Receiver:
huh?
add noise onthis wire
t
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6.002 Fall 2000 Lecture 4
Value Discretization
Why is this discretization useful?
Restrict values to be one of two
HIGH
5V
TRUE
1
LOW
0V
FALSE
0
…like two digits 0 and 1
(Remember, numbers larger than 1 can berepresented using multiple binary digits andcoding, much like using multiple decimal digits torepresent numbers greater than 9. E.g., thebinary number 101 has decimal value 5.)
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6.002 Fall 2000 Lecture 4
Digital System
sender receiver
S V
RV
noise
S V
“0” “0”“1”
0V
2.5V
5V HIGH
LOW
t
RV
“0” “0”“1”
0V
2.5V
5V
t
V V N
0=
N V
S V
“0” “0”“1”
2.5V t
With noiseV V
N 2.0=
S V
“0” “0”“1”
0V
2.5V
5V
t
0.2V
t
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6.002 Fall 2000 Lecture 4
Digital System
Better noise immunityLots of “noise margin”
For “1”: noise margin 5V to 2.5V = 2.5V For “0”: noise margin 0V to 2.5V = 2.5V
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6.002 Fall 2000 Lecture 4
Voltage Thresholdsand Logic Values
1
0
1
0
sender receiver
1
0
0V
2.5V
5V
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6.002 Fall 2000 Lecture 4
forbiddenregion
VH
V L
3V
2V
But, but, but …
What about 2.5V?
Hmmm… create “no man’s land”
or forbidden region
For example,
sender receiver
0V
5V
1 1
0 0
“1” V 5V
“0” 0V V
H
L
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6.002 Fall 2000 Lecture 4
sender receiver
But, but, but …Where’s the noise margin?
What if the sender sent 1: ?VHHold the sender to tougher standards!
5V
0V
11
00
V
0H
V0L
VIH
VIL
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6.002 Fall 2000 Lecture 4
sender receiver
5V
0V
VH
But, but, but …Where’s the noise margin?
What if the sender sent 1: ?
Hold the sender to tougher standards!
“1” noise margin:
“0” noise margin:
VIH
- V0H
VIL
- V0L
1 1
00
V0H
V0L
VIH
V
IL
Noise margins
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6.002 Fall 2000 Lecture 4
Digital systems follow static discipline: ifinputs to the digital system meet valid inputthresholds, then the system guarantees itsoutputs will meet valid output thresholds.
sender
receiver
0 1 0 1
t
5VV
0H
V0L
0V
VIHV
IL
0 1 0 1
t
5VV
0H
V0L
0V
VIH
VIL
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6.002 Fall 2000 Lecture 4
Processing digital signals
Recall, we have only two values —
Map naturally to logic: T, F
Can also represent numbers
1,0
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6.002 Fall 2000 Lecture 4
Processing digital signalsBoolean Logic
If X is true and Y is trueThen Z is true else Z is false.
Z = X AND YX, Y, Z
are digital signals“0” , “1”
Z = X • YBoolean equation
Enumerate all input combinations
Truth table representation:
ZX Y
AND gateZX
Y
0 0 0
0 1 01 0 0
1 1 1
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6.002 Fall 2000 Lecture 4
Adheres to static discipline Outputs are a function of
inputs alone.
Combinational gateabstraction
Digital logic designers do not
have to care about what is
inside a gate.
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6.002 Fall 2000 Lecture 4
Demo
Noise
ZXY
Z = X • Y
Z
Y
X
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6.002 Fall 2000 Lecture 4
Z = X • Y
Examples for recitation
X
t
Y
t
Z
t
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6.002 Fall 2000 Lecture 4
In recitation…
Another example of a gateIf (A is true) OR (B is true)
then C is true
else C is false
C = A + B Boolean equation
OR
OR gate
CA
B
ZX
Y NAND
Z = X • Y
More gates
B B
Inverter
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6.002 Fall 2000 Lecture 4
Boolean Identities
AB + AC = A • (B + C)
X • 1 = XX • 0 = XX + 1 = 1X + 0 = X
1 = 0
0 = 1
output
BC B • C
A
Digital Circuits
Implement: output = A + B • C
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6.002 Fall 2000 Lecture 5
6.002 CIRCUITS ANDELECTRONICS
Inside the Digital Gate
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6.002 Fall 2000 Lecture 5
Review
Discretize value 0, 1
Static disciplinemeet voltage thresholds
Specifies how gates must be designed
sender receiver
forbiddenregion
OLV
OH V
ILV
IH V
The Digital Abstraction
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6.002 Fall 2000 Lecture 5
Review
C A B
0 0 10 1 11 0 11 1 0
A
B C
NAND
Combinational gate abstractionoutputs function of input alonesatisfies static discipline
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6.002 Fall 2000 Lecture 5
How to build a digital gate
C
B
A
OR gate
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6.002 Fall 2000 Lecture 5
Electrical Analogy
+ –
Bulb C is ON if A AND B are ON,else C is off
Key: “switch” device
V
A BC
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6.002 Fall 2000 Lecture 5
Electrical Analogy
Key: “switch” device
C
in
out
control
3-Terminal deviceif C = 0
short circuit between in and outelse
open circuit between in and out
For mechanical switch,control mechanical pressure
in
out
1=C
equivalent ck
0=C
in
out
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6.002 Fall 2000 Lecture 5
Consider
=S
V “1”
+ – S V
L R
C
IN
OUT
OUT V
S V
0=C
OUT V
S V
1=C
OUT V
S V
L R
C
OUT V
Truth table for
C
0 1
1 0
OUT V
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6.002 Fall 2000 Lecture 5
What about?Truth table for
OV 2c
0 0 10 1 11 0 1
1 1 0
1c
Truth table for
OV 2c
0 0 1
0 1 01 0 01 1 0
1c
S V
OUT V
1c
2c
S V
OUT V
1c 2c
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6.002 Fall 2000 Lecture 5
What about?
can also build compound gates
S V
D
A
B
C ( ) C B A D +⋅=
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6.002 Fall 2000 Lecture 5
The MOSFET DeviceMetal-OxideSemiconductorField-EffectTransistor
3 terminal lumped elementbehaves like a switch
: control terminal: behave in a symmetricmanner (for our needs)
G
S D,
gate≡
source
D
S
G
drain
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6.002 Fall 2000 Lecture 5
The MOSFET Device
Understand its operation by viewing it
as a two-port element —
“Switch” model (S model) of the MOSFET
D
S
Gi
G
GS v+
–
DS v
DS i +
–
Ch ec k o u t
th e t e x t b
o o k
f o r i t s i n
t e r n a l
s t r uc t u r
e.
T GS V v <
T GS V v ≥
V V T 1≈ typically
onG
D
S
DS i
G off
D
S
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6.002 Fall 2000 Lecture 5
Check the MOS deviceon a scope.
Demo
GS v+
–
DS v
DS i
+
–
T GS V v ≥
DS i
DS v
T GS V v <
DS i
DS vvs
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6.002 Fall 2000 Lecture 5
A MOSFET Inverter
S V
L R
A IN
B
A B
V 5=
Note the power of abstraction.
The abstract inverter gate representationhides the internal details such as powersupply connections, , , etc.
(When we build digital circuits, theand are common across all gates!)
L R GND
vOUT
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6.002 Fall 2000 Lecture 5
The T1000 model laptop desires gates that satisfythe static discipline with voltage thresholds. Doesout inverter qualify?
IN v
OUT v
OUT v
IN v
5V
5V
0V=1VT V
= 0.5VOL
V
= 4.5VOH V
= 0.9V IL
V
= 4.1V IH V
Our inverter satisfies this.
receiver
OLV
OH V
ILV
IH V
54.5
0.5
0
sender
5
4.1
0.9
0
1:
0:
1
0
Example
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6.002 Fall 2000 Lecture 5
E.g.:
Does our inverter satisfy the staticdiscipline for these thresholds:
= 0.2VOL
V
= 4.8VOH V
= 0.5V IL
V
= 4.5V IH V
= 0.5VOL
V
= 4.5VOH V
= 1.5V IL
V
= 3.5V IH V
yes
no
x
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6.002 Fall 2000 Lecture 5
Switch resistor (SR) modelof MOSFET
…more accurate MOS model
D
S
G
D
S T GS
V v <
G
T GS V v ≥
ON R
D
S
G
e.g. Ω= K RON
5
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6.002 Fall 2000 Lecture 5
SR Model of MOSFET
MOSFET S model
T GS V v ≥
T GS V v <
DS i
DS v
MOSFET SR model
T GS V v ≥
T GS V v <
DS i
DS v
ON R
1
D
S
G
D
S T GS
V v <
G
T GS V v ≥
ON R
D
S
G
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6.002 Fall 2000 Lecture 5
Using the SR model
=S
V “1”
+ – S V
L R
C
IN
OUT
OUT v
S V
0=C
OUT v
S V
1=C OUT
v
S V
L R
C
OUT v
Truth table for
C
0 11 0
OUT V
T GS V v ≥
ON R
ON R
OLV
L R
ON R
ON R
S V
OUT v ≤
+=
L R
L R Choose RL, RON, VS such that:
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6.002 Fall 2000 Lecture 6
6.002 CIRCUITS ANDELECTRONICS
Nonlinear Analysis
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6.002 Fall 2000 Lecture 6
Discretize matter LCA
m1 KVL, KCL, i-v
m2 Composition rules
m3
Node methodm4 Superposition
m5 Thévenin, Norton
anycircuit
linearcircuits
Review
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6.002 Fall 2000 Lecture 6
Discretize value
Digital abstraction Subcircuits for given “switch”
setting are linear! So, all 5methods (m1 – m5) can be
applied
1
1
=
=
B
A
B
S V
L R
C
S V
L R
C
ON R ON R
SR MOSFET Model
Review
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6.002 Fall 2000 Lecture 6
Today
Nonlinear Analysis
Analytical methodbased on m1, m2, m3
Graphical method
Introduction to incremental analysis
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6.002 Fall 2000 Lecture 6
How do we analyze nonlinearcircuits, for example:
Dv+ -
D
Di
Dv
Di
0,0
Dbv
D aei =
a
Dv+
-V +
–
Hypotheticanonlineardevice D
Di
(Expo Dweeb ☺)
(Curiously, the device supplies power when v D is negative)
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6.002 Fall 2000 Lecture 6
Method 1: Analytical Method
Using the node method,(remember the node method applies for linear ornonlinear circuits)
Dbv
D aei = 2
0=+−
D D i
R
V v1
2 unknowns 2 equations
Solve the equation by trial and error numerical methods
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6.002 Fall 2000 Lecture 6
Method 2: Graphical Method
Notice: the solution satisfies equations
and 21
Dv
Di
a
Dbv D aei =2
Dv
Di 1 R
v
R
V i D D −=
R
V
V
R
slope 1−=
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6.002 Fall 2000 Lecture 6
Combine the two constraints
1
4
1
1
1
=
=
=
=
b
a
R
V e.g.
Ai
V v
D
D
4.0
5.0
=
=
Dv
Di
5.0~
4.0~
R
V
V 1
1
a¼
called “loadline”for reasons youwill see later
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6.002 Fall 2000 Lecture 6
Method 3: Incremental AnalysisMotivation: music over a light beam
Can we pull this off?
LED: LightEmittingexpoDweep ☺
Dv+
-
)(t I + –
Di
LED Ri
AMP
light intensity I Rin photoreceiver
R R I i ∝
light
intensity D D i I ∝
I v
t
music signal
)(t v I light sound)(t i R)(t i D
nonlinearlinear
problem! will result in distortion
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6.002 Fall 2000 Lecture 6
Problem:The LED is nonlinear distortion
I D vv = Dv
Di
vD
t
t
Di v D
Di
t
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6.002 Fall 2000 Lecture 6
If only it were linear …
vD
t
Di
Dv
Di
it would’ve been ok.
What do we do?
Zen is the answer
… next lecture!
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6.002 Fall 2000 Lecture 7
6.002 CIRCUITS ANDELECTRONICS
Incremental Analysis
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6.002 Fall 2000 Lecture 7
Nonlinear Analysis
Analytical method
Graphical method
Today
Incremental analysis
Reading: Section 4.5
Review
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6.002 Fall 2000 Lecture 7
Method 3: Incremental AnalysisMotivation: music over a light beam
Can we pull this off?
LED: Light
EmittingexpoDweep ☺
Dv+
-
)(t I + –
Di
LED
Ri
AMP
light intensity I Rin photoreceiver
R R I i ∝
light
intensity D D i I ∝
I v
t
music signal
)(t v I
light sound)(t i R
)(t i D
nonlinearlinear
problem! will result in distortion
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6.002 Fall 2000 Lecture 7
Problem:The LED is nonlinear distortion
I D vv = Dv
Di
vD
t
t
Di v D
Di
t
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6.002 Fall 2000 Lecture 7
Insight:
D
v
Di
D I
DV
DC offsetor DC bias
Trick:
d D D i I i +=
I V
Dv+
-
)(t vi+ –
LED+ –
I v
d D D vV v +=
I V iv
small regionlooks linear(about V D , I D)
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6.002 Fall 2000 Lecture 7
Result
v d very small
Di
Dv
d i
D I
DV
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6.002 Fall 2000 Lecture 7
Result
t
Dv DV
I D vv =
t
D I
Di
~linear!
Demo
d v
d i Di
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6.002 Fall 2000 Lecture 7
total
variable
DC
offset
small
superimposedsignal
The incremental method:(or small signal method)
1. Operate at some DC offsetor bias point V D, I D .
2. Superimpose small signal vd (music) on top of V D .
3. Response id to small signal vd is approximately linear.
Notation:
d D D i I i +=
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6.002 Fall 2000 Lecture 7
( ) D D v f i =
What does this meanmathematically?Or, why is the small signal responselinear?
We replaced
D D D
vV v Δ+=
using Taylor’s Expansion to expand f(v D) near v D=V D :
( ) DV v D
D D D v
dv
vdf V f i
D D
Δ⋅+=
=
)(
+Δ⋅+
=
2
2
2 )(
!2
1 D
V v D
D v
dv
v f d
D D
large DC
incrementabout V D
nonlinear
d v
neglect higher order terms
because is small DvΔ
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6.002 Fall 2000 Lecture 7
( ) DV v D
D D D v
vd
v f d V f i
D D
Δ⋅+≈
=
)(
equating DC and time-varying parts,
D
V v D
D D v
vd
v f d i
D D
Δ⋅=Δ
=
)(
constantw.r.t. Δv D
constant w.r.t. Δv Dslope at V D, I D
( ) D D V f I =
operating point
constant w.r.t.Δ
v D
X :
We can write
( ) DV v D
D D D D vvd
v f d V f i I
D D
Δ⋅+≈Δ+=
)(
so, D D vi Δ∝Δ
By notation,
d D ii =Δ
d D vv =Δ
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6.002 Fall 2000 Lecture 7
Equate DC and incremental terms,
Dbv
D eai =
In our example,
From X : d bV bV
d D vbeaeai I D D ⋅⋅
constant
+≈+
DbV
D ea I =
d
bV
d vbeai D ⋅⋅=
operating point
d Dd vb I i ⋅⋅=
small signalbehaviorlinear!
aka bias pt.aka DC offset
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6.002 Fall 2000 Lecture 7
DbV
D ea I = operating point
d Dd vb I i ⋅⋅=
Dv
Di
D I
DV
slope at
V D, I D
operating
point
we areapproximatingA with B
A
B
d v
d i
Graphical interpretation
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6.002 – Fall 2002: Lecture 8
6.002 CIRCUITS ANDELECTRONICS
Dependent Sources
and Amplifiers
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6.002 – Fall 2002: Lecture 8
Nonlinear circuits — can use thenode method
Small signal trick resulted in linearresponse
Today
Dependent sources
Reading: Chapter 7.1, 7.2
Review
Amplifiers
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6.002 – Fall 2002: Lecture 8
Dependent sources
+ – v
i
vi =Resistor
2-terminal 1-port devices
+ – v
i i = I
IndependentCurrent source
Seen previously
controlport
outputport
I i
v
Oi
Ov
+
–
+
–
New type of device: Dependent source
2-port device
E.g., Voltage Controlled Current SourceCurrent at output port is a function of voltageat the input port
)v( f I
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6.002 – Fall 2002: Lecture 8
Dependent Sources: Examples
independentcurrentsource
Example 1: Find V
0=
+
– V
V 0
=
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6.002 – Fall 2002: Lecture 8
voltagecontroledcurrent
source
Example 2: Find V
( ) V K
V f I ==
+
– V
I i
v
Oi
Ov
+
–
+
–
+
– V
( ) I
I v
K v f =
Dependent Sources: Examples
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6.002 – Fall 2002: Lecture 8
voltagecontroledcurrentsource
RV
K IRV ==
KRV =2
KRV =33
1010 ⋅= −
Volt 1=
oror
Example 2: Find V
( ) V K
V f I ==
+
– V
e.g. K = 10-3 Amp·Volt R = 1k Ω
Dependent Sources: Examples
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6.002 – Fall 2002: Lecture 8
Another dependent source example
I v + –
( ) IN D v f i =
L
+ – S
V
e.g. ( ) N D v f i =
( )2 IN 1v2
K −= for v IN ≥ 1
IN i
IN v
Di
Ov
+
–
+
–
otherwise0i D =
Find vO as a function of v I .
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6.002 – Fall 2002: Lecture 8
Another dependent source example
Find vO as a function of v I .
I v + –
I v
S V
Ov
L
( )2 IN D 1v2
K i −= for v IN ≥ 1
otherwise0i D =
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6.002 – Fall 2002: Lecture 8
Another dependent source example
0=++− O L DS viV
KVL
L DS O iV v −=
( ) L I S O Rv K
V v 2
12
−−= for v I ≥ 1
S O V v = for v I < 1
I v + –
I v
S V
Ov
L
( )2 IN D 1v2
K i −= for v IN ≥ 1
otherwise0i D =
Hold that thought
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6.002 – Fall 2002: Lecture 8
Next, Amplifiers
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6.002 – Fall 2002: Lecture 8
Why amplify?Signal amplification key to both analogand digital processing.
Analog:
Besides the obvious advantages of being
heard farther away, amplification is keyto noise tolerance during communcation
AMP IN OUT
InputPort
OutputPort
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6.002 – Fall 2002: Lecture 8
Why amplify?
Amplification is key to noise toleranceduring communcation
usefulsignal
huh?
1 mV n o i
s e10 mV
No amplification
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6.002 – Fall 2002: Lecture 8
AMP
Try amplification
not bad!
n o i s e
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6.002 – Fall 2002: Lecture 8
Why amplify?
Digital:
IN OUT
Digital System
LV IH V
5V
0V OLV
OH V 5V
0V
t
5V
0V
ILV
IH V
IN OUT
t
5V
0V OL
V
OH V
Valid region
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6.002 – Fall 2002: Lecture 8
Why amplify?
Digital:
Static discipline requires amplification!
Minimum amplification needed:
ILV H V
OLV
OH V
L IH
OLOH
V V
V V
−
−
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6.002 – Fall 2002: Lecture 8
Remember?
0=++− O L DS viV
KVL
L DS O iV v −=
( ) L I S O Rv K
V v 2
12
−−= for v I ≥ 1
S O V v = for v I < 1
Claim: This is an amplifier
I v + –
I v
S V
Ov
L
( )2 IN D 1v2
K i −= for v IN ≥ 1
otherwise0i D =
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6.002 – Fall 2002: Lecture 8
So, where’s the amplification?
Let’s look at the vO versus v I curve.
amplification1>Δ
Δ O
v
v
Ω=== k 5 R ,
V
mA2 K ,V 10V L2S e.g.
OvΔ
vΔ
( )212
−−= I LS O v R K
V v
( )21510 −−= I O vv
( )233 1105102
210 −⋅⋅⋅−=
−
I v
1 I v
S V
Ov
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6.002 – Fall 2002: Lecture 8
One nit …
1 I v
Ov
Mathematically,
( )212
−−= I LS O v R K V v
Whathappenshere?
So is mathematically predicted behavior
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6.002 – Fall 2002: Lecture 8
One nit …
Di
S V
Ov L
VCCS
1 I v
Ov
For vO>0, VCCS consumes power: vO i DFor vO
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6.002 – Fall 2002: Lecture 8
If VCCS is a device that can sourcepower, then the mathematicallypredicted behavior will be observed —
( )212
−−= I LS O v R K
V vi.e.
where vO goes -vev
Ov