Electronics Circuits : EBOOK

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Basic Electronics with DoCircuits

Topic: Semiconductor diode-‐ Crystal diode

Keywords: Diode, Rectifier, Center tap

Q1. A crystal diode having an internal resistance rt = 10 Ω is used for center tapped full wave rectification. If the applied voltage is V = 50 sin (πt) and the load resistance is RL = 1 kΩ, determine the followings:

Draw the input and output voltage and current waveforms.

The efficiency of the circuit.

The Ripple factor.

Ans:

(Figure: Circuit arrangement of centre-‐tap Fullwave rectifier)

Data given: In a cerrte-‐tap full wave rectifier the internal resistance of diodes D1 & D2 i.e. rf = 10Ω

The applied input voltage, V=50 sin (πt)

As the input applied voltage is V = 50 sin πt which is a sinusoidal signal can be represented as below.

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Operation: During +ve half cycle (i.e. o-‐π) the diode D1 will conduct due to forward bias and diode D2 will be OFF due to reverse bias so that the current will flow at the upper half portion of the circuit. As a result a voltage will develop across load RL.

Similarly during – ve half cycle (i.e. π-‐2π) the diode D2 will conduct due to forward bias and diode D1 will conduct due to forward bias and diode D1 will be OFFdue to reverse bias so that the current will flow at the lower half portion of the circuit. As a result a voltage will develop across load RL.

It is observed that the current which will flow through load RL is unidirectional during both half cycle hence an pulsating during both half cycle hence an pulsating dc voltage obtained across load RL.

The input and output waveform of centre trapped full wave rectifier is shown in figure below.

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(Figure (b) Output waveform of centre tapped F.W.R.)

The efficiency of the circuit.

Ans. Maxm load current,

Imax = Vmax / rf + RL = 50V/(10+1000)Ω

=50V/1010Ω = 49.5 m amp

The average current, Idc = 21max / Ω

=31.5 m amp

The r.m.s. current, Irms = Imax / Square root 2 = 35 m amp

Rectification efficiency (ŋ) – It is defined as the ratio of dc output power to the input ac power i.e.

%ŋ = Podc / Piac x 100% = 12 d RL / I

2rms (rf+RL)

Where Podc = output dc power

Piac = input ac power

= (31.5 m amp)2 x 1kΩ / (35m amp)2 x 1010Ω

0.99225 / 1.23725 x 100% = 80.19%

The Ripple factor.

Ans. Ripple factor (r): It is defined as the ratio of r.m.s. value of ac component to the dc component in the rectifier output

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Practice : Try this out in the virtual lab

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Topic: Transistor-‐Biasing

Keywords: Transistor, BJT, Bias

Q.2. (a) Explain the difference between Voltage divider bias and Self bias circuits.

Ans. The difference between voltage divider bias and self bias circuit given below.

Self bias: The self bias circuit doesn’t provide good stabilization for high base voltage. For improving the performances of self bias either increase the base resistor RB or decrease the base bias supply voltage or both.

Voltage divider bias: The voltage divider bias provides a better stabilization than others, for base voltage (VB) where the level of VB depends on resistor R2 and R2 can be change by using a variable resistor so that it divides the supply voltage Vcc among resistors R1 and R2.

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(b)For the circuit shown below, determine IB, ICQ, VE, VCEQ and VB where symbols denote their usual meaning.

Data given:

Biasing resistors R1 & R2 = 510kΩ Collector resistor RC = 9.1kΩ

Emitter resistor RE = 7.5kΩ

Supply voltages, +VCC = +18V

& -‐VCC = -‐18V

Current amplification factor β = 130

Let Base current is IB

Collector current is IC

Emitter current is IE

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Collector voltage is VC

& emitter voltage is VE.

The given circuit can be simplified and base current can be calculated by using Thevenin theorem where, Thevenin equivalent voltage VTh can be obtained as below.

In circuit applying KVL at indicated loop, the expression is

18V – I x 510K – I x 510K +18=0

I = 36 / 1020K

So that Vth =-‐18+36/1020K x 510K = 0volt

The Thevenin equivalent resistance Rth is obtained as below

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Rth = 510K 510K

= 255kΩ

The resultant Thevenin circuit for given circuit is as given below:

Applying KVL in the input loop the expression is

-‐255KIB – 0.7V – (β+1) IB x 7.5K + 18=0

IB (255+131x7.5)K = (18-‐0.7)V

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IB = 17.3V / 1237.5K = 13.97 µamp.

Therefore Collector current IC = βIB = 130 x 0.1397

=1.817 MA

Therefore Emitter voltage VE= -‐18+1.817 Max 7.5KΩ

=-‐4.37 Volt.

Applying KVL to the output loop; the expression is

18V – 1.817mA x 9.1 KΩ -‐ VCE

-‐1.817mA x 7.5kΩ+18V=0

VCE = 36V – 1.817 mAx16.6 kΩ=5.83 Volt.

The collector voltage VC = VCE + VE

=5.83 volt + (-‐4.374_ = 1.46 volt.


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Topic: Operational amp

Keywords: Operational Amplifier, Inverting

Q3 (a) Write ideal characteristics of an opamp.

Ans: The ideal characteristics of an op-‐amp is given below:

Open loop again, A is infinite.

Input resistance R1 is infinite

Output resistance Ro is zero.

Output signal ins zero when input signal is zero.

CMRR (Common Mode Rejection Ratio) zero.

Bandwidth, BW is infinite.

Slew Rate (SR) is infinite.

(b) Draw circuits for both inverting and non-‐inverting amplifiers using opamp. Derive an expression for the gain of an inverting amplifier.

Ans. The circuit for Inverting Amplifier using op-‐amp is shown below.

(Figure: Circuit of Inverting Amplifier)

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(Figure: Non-‐inverting Amplifier)

Applying Kirchoff’s current law at node ‘V2’ of an inverting amplifier, the current expression can be written as

I1 = IF +IB …(1)

As Ri (input resistance of op-‐amp) is very large

IB = 0 µA

Therefore I1 = IF

Vin -‐ V2/R1 = V2-‐V0 /RF …(2)

Again the open loop gain, A= VO / Vd = VO / V1 – V2

As Voltage at Non-‐inverting terminal (V1) is zero

Hence the ouput voltage (VO) = -‐AV2

Voltage at Inverting terminal, V2 = -‐VO/A …(3)

Substituting the eqn (3) at eqn (2), it can be written as

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Vin + VO / A / R1 = -‐VO – VO /A / RF

So the closed loop gain of the ckt. i.e.

AF = VO / Vin = -‐A RF / R1 + RF + ARI (Exact) …(4)

As A = 106 (For an ideal op-‐amp)

Therefore AR1 >> R1 + RF

Therefore AF = -‐RF / R1 (Ideal)


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Topic: Diode applications

Keywords: Diode, Clipper, Wave shaping network

Q.4. (a) What is a clipper circuit ? Explain with an example.

(b) Analyze and draw the output waveform of the following circuit when Vi=5 Sin (100πt).

Ans. Clipper Circuit: The circuit with which the waveform is shaped by removing (or clipping) a portion of the applied wave is known as a clipping circuit/clipper/clipper circuit.

The clipper circuit may be classified into three type depending upon its clipping action i.e.

Positive clipper.

Negative clipper.

Biased clipper.

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The Half wave rectifier is an example of a clipper which eliminates one of the alterations of an ac signal.

Explanation:

Let us consider a half wave rectifier ckt which given below:

(Input wave form)

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(Output wave form)

(Figure – b)

Consider diode is an ideal diode [i.e it becomes short circuit when it will forward bias i.e VD > 0 volt and open circuit when it will reverse bias VD<0V, where VD is the voltage across diode]

So during the +Ve half cycle of an i/p ac signal (ie from 0 to π) the diode will be forward bias & make it short circuited. So that there will be a current which flow through ‘RL’

So that we can obtain an output voltage which shown in figure (b).

But during negative half cycle of an signal (ie from ‘π’ to 2π) the diode becomes reverse bias so it makes an open circuited. As a result the current flow through diode is zero. Hence the output voltage is zero during this period.

N.B.: From the input & Output waveform it is clear that by help of the above circuit we can obtain the output during +ve cycle only not in negative cycle. Hence this circuit is called as “Series negative clipper” circuit.

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Q. (b) Analyze and draw the output waveform of the following circuit when Vi=5 Sin (100πt).

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Ans.

This is positive biased clamper circuit. The circuit can be analyzed as follows.

During “-‐Ve” half cycle of input signal, the diode is forward biased. The network will appear as shown in figure below.

From the above figure it is clear that the output voltage, VO = -‐3.7 volt.

Further applying Kirchholff’s voltage law to the input loop we have

-‐3.7V – VC + 5V = 0

=VC=5V-‐3.7V = 1.3 Volt

Therefore the capacitor will charge upto 1.3 volt.

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During the positive half cycle of the input signal, the diode is reverse biased and will behave as open circuits as shown in figure below.

Now battery of -‐3V has no effect on ‘VO’.

Applying Kirchhoff’s voltage law to the outside loop of above figure we have

5V+VC -‐ VO =0

=VO=5V+VC=5V+1.3 Volt=6.3 Volt

The clamper output is shown in figure below.

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N.B.: The output swing of 10V matches with the input swing.



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Topic: Opamp

Keywords: Op-‐amp, summing amplifier

Q. 5. Find out the output voltage for the circuit given in the Figure below. Derive the necessary equation.

Ans:

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Consider the different voltage & current with different nodes & different paths as shown in figure above.

The above circuit can be simplified by using virtual ground concept for getting its output voltage VO.

As per virtual ground concept

Let (i) AV =∞=Vd=0 Volt

=VA – VB = O Volt

But from above circuit as VB=0 volt

Hence VA = 0 Volt.

Again Ri =∞Ω. So Ii = 0mAmP

Applying KCI at node A we can obtain

Iin = IF

=I1+I2+I3=IF

=1V – VA / 20K + 2V-‐VA/10K + 5V – VA/30K = VA-‐V0/150K

=1V/20K + 2V/10K+5V/30K=-‐VO/150K[as VA=0V]

=V0=-‐150K [1V/20K + 2V / 10K + 5V/30K]

=-‐ 150K/20K x 1 -‐150K/10K x 2V -‐150K/30K x 5V

=-‐7.5V – 30V – 25V=-‐62.5 Volt

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Topic: Transistor Biasing

Keywords: Transistor, BJT, Bias

Q.6. Find Q-‐ Point of the fixed bias circuit having ‘Si’ transistor with dc bias β=50. Assume VBE=0.6 Volt.

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Ans.

Data given: The collector resistor RC=2.2KΩ

Base resistor RB = 270 KΩ

Supply voltage, VCC = 9V

Current amplification factor β=50V.

Base to emitter voltage, VBE =0.6 V.

Let base current is IB.

Collector current is IC.

& emitter current is IE.

Collector to emitter voltage is VCE

Redraw the above circuit as per the following circuit.

Applying KVL at input loop we can obtain

VCC – IBRB – VBE = 0

=IB = VCC – VBE / RB

=9V – 0.6V/270KΩ = 29.6µA = Amp

So IC = βIB = 50x29.6µA=1.48mA = ICQ

Applying KVL at output loop, we can obtain

VCC-‐IC RC-‐VCE = O

=VCE = VCC – ICRC = 9V – 1.48mAx2.2K

=9V – 3.26V=5.74 Volt = VCEQ

Hence the Q point values of the Fixed bias is (5.74V, 1.48mA)

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Electronics Circuits : EBOOK