AVR_Course_Day6 external hardware interrupts and analogue to digital converter

External Hardware Interrupts and Analogue to digital

ConverterEng:Mohamed Loay Ali

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Contents External Hardware Interrupt.

1. Introduction2. Registers.3. Programming in C.4. External Interrupt priority (Vector table).

Analogue to Digital Converter ADC.1. Introduction2. ADC Features in AVR3. Registers4. Programming in C5. LDR.6. Temperature Sensor LM35.

Eng:Mohamed Loay Ali

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External Hardware InterruptEnabling the Interrupts:To enable the interrupt is should be unmasked as shown in the following figure.

SREG is the Status register ,to enable the interrupt (unmask the interrupt) the bit D7(I) should be activated using sei() set interrupt then use TMISK register to enable interrupts of Timer (0 or 1 or 2)this will covered later.

To disable the interrupt the bit D7(I) should be cleared by cli()clear the interrupt.


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External Hardware Interrupt

The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT23...0 pins.

Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1or PCINT23...0 pins are configured as outputs.

The INT0 and INT1 interrupts can be triggered by a falling or rising edge or a low level.

The other pins interrupts can be triggered by toggling the pins.

1.Introduction


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External Hardware Interrupt1.Introduction


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External Hardware Interrupt1.Introduction


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External Hardware Interrupt2.Registers


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When an edge or logic change on the INT1or 2 pin triggers an interrupt request, INTF1 or 2 becomes set (one). If the I-bit in SREG and the INT1 or 2 bit in EIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector.


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Bit 2 – PCIE2: Pin Change Interrupt Enable 2Any change on any enabled PCINT[23:16] pin will cause an interrupt.

Bit 1 – PCIE1: Pin Change Interrupt Enable 1Any change on any enabled PCINT[14:8] pin will cause an interrupt.

Bit 0 – PCIE0: Pin Change Interrupt Enable 0Any change on any enabled PCINT[7:0] pin will cause an interrupt

These interrupts can be triggered only if the bits is enabled and the I-bit in the Status Register (SREG) is set (one).


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External Hardware Interrupt4)External Interrupt priority (Vector table)

See external interrupt priority example.


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External Hardware Interrupt3.Progarmming in C

See the following Examples

1)External interrupt example 12)External interrupt example 2


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ADC1)Introduction to ADC

ADC devices:

ADC are widely used in data acquisition systems.

Digital systems use binary (discrete) values , but in the physical world every is thing is analogue (Continuous).

Therefore the ADC is required to convert the analogue signal (continuous) to digital signal (discrete) so the microcontroller can read and process the data.

The physical quantity such as (Pressure , Temperature and velocity ) are converted to electrical signal (Volt or Current) through sensor or tranducer then fed into the ADC.


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Difference Between Analogue Signal and Digital Signal


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The Discretization of the signals:


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The Procedure of taking a signal from real world to Digital System Controller


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Some Major Characteristics of ADC:

RESOLUTION:

Is the smallest change that can be discerned by an ADC.

The ADC has n-bit, where n can be 8, 10,12,16,24.

The higher resolution ADC provides higher step size


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Relation between Vin and Vref


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Relation between Vin and Vref


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CONVERSION TIME: Is defined as the time it takes the ADC to convert the analogue signal to the

digital signal. The conversion time is dictated by the clock source connected to the ADC in

addition the method used for data conversion and technology in fabrication (TTL or MOS).

DIGITAL DATA OUTPUT: In 8 bit-ADC there is 8-bit digital data output of (D0-D7) while in 10 bit the

data output (D0-D9). To calculate the output voltage the following formula is used .


Where Dout=digital data input in decimal and Vin=analogue input voltage.


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ADC2)ADC Features in AVR


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The ATmega4328P features a 10-bit successive approximation ADC.

The ADC is connected to an 8-channel Analog multiplexer which allows eight single-ended voltage inputs constructed from the pins of Port A.

The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is held at a constant level during conversion.



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Typical Connection to get the maximum accuracy


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By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz to get maximum resolution.

The ADC module contains a prescaler, which generates an acceptable ADC clock frequency from any CPU frequency above 100kHz

The actual sample-and-hold takes place 1.5 ADC clock cycles after the start of a normal conversion and 13.5 ADC clock cycles after the start of an first conversion.



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ADC3)Registers

ADLAR: ADC Left Adjust Result


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ADC3)Registers


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ADC3)Registers


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ADC3)Registers


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ADEN: ADC Enable Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off.

ADSC: ADC Start Conversion In Single Conversion mode, write this bit to one to start each conversion and will be cleared by hardware when the conversion is completed.

ADATE: ADC Auto Trigger Enable .When this bit is written to one, Auto Triggering of the ADC is enabled.

ADIF: ADC Interrupt Flag .This bit is set when an ADC conversion completes and the Data Registers are updated.

ADIE: ADC Interrupt Enable .When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete Interrupt is activated.

ADPS[2:0]: ADC Prescaler Select Bits .These bits determine the division factor between the system clock frequency and the input clock to the ADC

ADC3)Registers


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ADC3)Registers

By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz to get maximum resolution. If a lower resolution than 10 bits is needed, the input clock frequency to the ADC can behigher than 200kHz to get a higher sample rate.


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ADC3)Registers


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ADC3)Registers

The ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA. Voltage reference and input channel selections will not go into effect until ADEN is set.

The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH and ADCL. By default, the result is presented right adjusted, but can optionally be presented left adjusted by setting the ADLAR bit in ADMUX.

If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read ADCH. Otherwise, ADCL must be read first, then ADCH, to ensure that the content of the Data Registers belongs to the same conversion.


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ADC3)Registers


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ADC3)RegistersBit 2:0 – ADTS[2:0]: ADC Auto Trigger SourceIf ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger an ADC conversion. If ADATE is cleared, the ADTS[2:0] settings will have no effect. A conversion will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trigger source that is cleared to a trigger source that is set, will generate a positive edge on the trigger signal.

Bit 5:0 – ADC5D...ADC0D: ADC5...0 Digital Input DisableWhen this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the ADC5...0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.


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ADC4)Programming in C:

Polling method:To program the AVR ADC using the concepts of polling the following steps should be taken: 1) Make the ADC channel as an input.

2) Turn the ADC module on and set the prescalar from ADCSRA register.

3) Set the Vref from REFS0:1 bits and ADC input channel from MUX4:0 bits, both in ADMUX register.

4) Activate the start conversion by (1<<ADSC) on ADCSRA register and wait.

5) Wait the conversion to complete by polling ADIF in ADCSRA register.

6) When ADIF goes high read (ADCL,ADCH).Remember to read ADCL first otherwise the result will be wrong.

See the ADC polling example


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ADC4)Programming in C:

Interrupt method:Same steps of polling but the ADIF won’t be used ,instead the ADIE for interrupt flag register will be used.

See the ADC interrupt example.


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Engineering

AVR_Course_Day6 external hardware interrupts and analogue to digital converter