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Instruction Set Architecture CS2052 Computer Architecture Computer Science & Engineering University of Moratuwa Dilum Bandara [email protected]

Instruction Set Architecture

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Page 1: Instruction Set Architecture

Instruction Set

Architecture

CS2052 Computer Architecture

Computer Science & Engineering

University of Moratuwa

Dilum [email protected]

Page 2: Instruction Set Architecture

Blocks of a Microprocessor

2

Literal

Address

Operation

Program

Memory

Instruction

Register

STACK Program CounterInstruction

Decoder

Timing, Control and Register selection

Accumulator

RAM &

Data

Registers

ALU

IO

IOFLAG &

Special

Function

Registers

Clock

Reset

Interrupts

Program Execution Section Register Processing Section

Set upSet up

Modify

Address

Internal data bus

Source: Makis Malliris & Sabir Ghauri, UWE

Page 3: Instruction Set Architecture

Instruction Set Architecture (ISA)

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Instruction Set

Software

Hardware

Source: Computer Architecture: A Quantitative Approach, J. L. Hennessy & D. A. Patterson, 3rd Edition.

Page 4: Instruction Set Architecture

ISA (Cont.)

Part of computer architecture related to

programming

Include native data types, instructions, registers,

addressing modes, memory architecture,

interrupt & exception handling, & external I/O

e.g., R1, R2, …, PC

e.g., MOV, ADD, INC, AND

ISA specifies the set of opcodes (machine

language), & native commands implemented by

a particular processor

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Page 5: Instruction Set Architecture

Well Known ISAs

x86

Based on Intel 8086 CPU in 1978

Intel family, also followed by AMD

X86-64

64-bit extensions

Proposed by AMD, also followed by Intel

ARM

32-bit & 64-bit

Initially by Acorn RISC Machine

ARM Holding

MIPS

32-bit & 64-bit

By Microprocessor without Interlocked Pipeline Stages (MIPS)

Technologies 5

Page 6: Instruction Set Architecture

Well Known ISAs (Cont.)

SPARC

32-bit & 64-bit

By Sun Microsystems

PIC

8-bit to 32-bit

By Microchip

Z80

8-bit

By Zilog in 1976

Many extensions

Intel – MMX, SSE, SSE2, AVX

AMD – 3D Now!

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Page 7: Instruction Set Architecture

A Good ISA

Lasts through many implementations

Portability, compatibility

Used in many different ways

Servers, desktop, laptop, mobile, tablet

Provides convenient functions to higher layer

Permit efficient implementation at lower layer

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Page 8: Instruction Set Architecture

Example – Instructions

Microprocessor that we are going to build will

support following 2 instructions

ADD

LOAD

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Page 9: Instruction Set Architecture

Activating Necessary Blocks

9Source: www.transtutors.com/homework-help/computer-

science/computer-architecture/cpu/general-register-organization/

Page 10: Instruction Set Architecture

Micro-operations

Digital modules are best described by

Registers they contain

Micro-operations performed on data stored on those

registers

Elementary operations done on data in registers

Register Transfer Language

Concise symbolic expressions

ADD ADD RC, RA, RB RC RA + RB

PC PC + 1

LOAD LOAD RA, d RA d

PC PC + 110

Page 11: Instruction Set Architecture

How to Describe a Computer

Set of registers & their functions

Sequence of micro-operations

Controls that initiates & maintains sequence of

micro-operations

Today, from a programming point of view,

Assembly is the lowest level we use to define

these registers, instructions, & their order of

execution

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Page 12: Instruction Set Architecture

Programming in Assembly

To program in Assembly we need

1. Knowledge about hardware design

Registers

Memory addressing

I/O

2. Knowledge about instruction set

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Page 13: Instruction Set Architecture

Registers (Review)

Type of memory located inside CPU

Can hold a single piece of data

Useful in both data processing & control

functionalities

Types

Special purpose registers

Program counter (PC)

Instruction register (IR)

Accumulator or working register (A or W)

Flag register (FLAG or STATUS)

General purpose registers

No special name, typically A, B, C, ... Or R1, R2, R3, ... 13

Page 14: Instruction Set Architecture

Format of an Assembly Statement

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[Identifier /

Label]

Operation/

Command/

Op code

[Operand(s)] [;Comment]

Labeling code or

to indicate a

program

destination

address for

jumps

What instruction to

be carried out by

CPU

Only valid

instructions are

allowed

Data or register

contents to be used

in instruction

Some instructions

don’t need operands

Explanatory text.

Optional but very

useful, as

Assembly

programs are

hard to

understand

L20: ADD RC, RA, RB ;RC RA + RB

Page 15: Instruction Set Architecture

Example – Instruction Set

We’ll use instruction set from PIC 16F87x for our

discussion

Textbook doesn’t use a specific set

Most other textbooks may use MIPS or x86

They are still too complex to start with

When you are more familiar, you can learn/use any

new instruction set

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Page 16: Instruction Set Architecture

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F file register

W working register

B bit

L literal (number)

Z conditional

execution

d destination bit

d=0 store in W

d=1 store in f

use , w or ,f instead

Source: Makis Malliris &

Sabir Ghauri, UWE

Page 17: Instruction Set Architecture

Opcode

Determines the

instruction

Registers, bits,

literals depend on

the opcode field

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Source: PIC16F87X Data Sheet by

Microchip Technology Inc.

Page 18: Instruction Set Architecture

Assembler

Assembler translates human readable code into

binary

Binary code specifies opcode & operands

ADDLW 135 means “add literal 135 to W register”

Assembler converts this to 11 1110 1000 0111

This is what the machine understands

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Page 19: Instruction Set Architecture

Program Operations

Load a register with a given number

Copy data from register to another

Carry out arithmetic & logical operations on a

data word or a pair of data words

Test a bit or word & jump, or not, depending on

result of the test

Jump to a point in the program

Jump to a subroutine

Carry out a special control operation

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Page 20: Instruction Set Architecture

Instruction Classification

Instruction Types

Data transfers

Arithmetic, logic

Rotates, shifts

Bit set, bit reset, & bit test

General-purpose, CPU

control

Jumps

Calls, returns

Instruction Function

Move

Register

Arithmetic

Logic

Test & Skip

Jump

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Page 21: Instruction Set Architecture

Data Transfer Instructions

Used to transfer data from one location to

another

Register to Register, Register to Memory, Memory to

Register

MOV

MOVLW 3 ; W 03h

MOVWF R1 ; R1 03h

MOV is same as LDA (Load) in textbook

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Page 22: Instruction Set Architecture

Arithmetic Instructions

Used in arithmetic operations

ADD – ADDWF R1 ; W W + R1

ADD – ADDLW 3 ; W W + 3

SUB – SUBLW 5 ; W W - 5

INC – INCF R1 ; R1 R1 + 1

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Page 23: Instruction Set Architecture

ALU (Review)

Data processing

unit

Arithmetic unit

Performs

arithmetic

operations

Logic unit

Performs logical

operations

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Accumulator

Source: Introduction to PIC Microcontroller – Part 1 by Khan Wahid

Page 24: Instruction Set Architecture

Example – Arithmetic Instructions

Write an assembly program to add 5 & 10

Steps

How many registers?

What registers to use?

What instructions are required?

MOV – MOVLW 5 ; W 05h

ADD – ADDLW 0xA ; W 05h + Ah

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Page 25: Instruction Set Architecture

Logic Operations

Used in bitwise logic operations

AND – ANDLW 3 ; W W & 0011

OR – IORLW 3 ; W W | 0011

XOR – XORLW 3 ; W W 1001

NOT – COMF 0x20,1 ;(0x20) (0x20)/

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Page 26: Instruction Set Architecture

Example – Logic Operations

Example

Write an assembly program to convert a given

character from uppercase to lowercase & vice versa

If we consider ASCII, this can be achieved by

changing the 5th bit

A = 65 =0x41 = 0 1 0 0 0 0 0 1

a = 97 =0x61 = 0 1 1 0 0 0 0 1

Get XOR with 00100000 = 32 = 0x20

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Page 27: Instruction Set Architecture

Transfer Instructions (Jump

Instructions)

Can be used to jump here & there within program

Can be used to control loops

GOTO – GOTO loop ;go to loop label

CALL – CALL delay ;call delay subroutine

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Page 28: Instruction Set Architecture

Example – Transfer Instructions

Example Write a program to calculate the total of all integers

from 1 to 10

High-level program

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int total = 0;

for (int i=1 ; i<=10; i++)

{

total += i;

}

Page 29: Instruction Set Architecture

Example – Transfer Instructions

(Cont.)

Steps

Are there any conditions/loops?

How many registers?

What registers to use?

What instructions to use?

ADDLW

Increment/decrement instruction – INCF, DECF

Let’s use memory address 0020h

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Page 30: Instruction Set Architecture

Transfer Instructions (Cont.)

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start movlw 0xa ; w 10

movwf 0x20 ; (0x20) w

movlw 0 ; total

loop addwf 0x0020,0 ; Add

decf 0x0020,1 ; Dec counter

btfss STATUS,Z ; is counter 0?

goto loop ; repeat

nop

end

int total = 0;

for (int i=10 ; i!=0; i--)

{

total += i;

}

Page 31: Instruction Set Architecture

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Homework

Example

Write an assembly program to multiply 3 & 4

Steps:

How many registers?

What registers to use?

What instructions to use?

MOV – MOVLW 3 ; W 03h

MUL – ???

Page 32: Instruction Set Architecture

Shift Operators >> <<

Move all bits in a value by given no of positions to left or

right10011011 01110110 10010011

>> 1 >> 3 >> 3

01001101 00001110 00010010

10011011 01110110

<<1 <<3

00110110 10110000

Multiply by powers of 2 – value << n (value * 2n)

e.g., 4 << 3 ; (4 * 8) =32

Divide by powers of 2 – value >>=n (value / 2n)

e.g., 75 >> 4; 75 / 16 =4

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Page 33: Instruction Set Architecture

Rotate Through Carry

RLF – Rotate Left f through Carry

Suppose carry was 1

RLF 9B 1 = 37

RLF 9B 2 = 6F

RRF – Rotate Right f through Carry

Suppose carry was 1

RRF 9B 1 = CD

RRF 9B 2 = E6 33

Page 34: Instruction Set Architecture

Comparison Operations

Comparing 2 numbers need to be treated with

care due to non-intuitive nature of Carry flagmovlw 2 ; W = 2

subwf Q, W ; W = Q - 2

btfss STATUS, C ; check carry flag

goto Gr_eq ; Q >= 2

goto Less ; Q < 2

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