Operational Amplifiers I

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C3.0 Operational Amplifiers I

Jeng-Han Tsai

Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 1999.

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Introduction• Operational amplifiers (op amps) are an integral part of many

analog and mixed-signal systems. • Op amps are used to realize

- dc bias generation - high-speed amplification- filtering.

• Analysis and design of CMOS op amps.- telescopic configuration- folded cascode configuration- two-stage configuration- gain-boosting configuration- problem of common-mode feedback. - the concept of slew rate- analyze the effect of supply rejection - analyze the effect of noise in op amps

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General Considerations

• Gain

• Small-signal bandwidth

• Large-signal bandwidth

• Output swing

• Linearity

• Noise and offset

• Supply rejection

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Gain

• The open-loop gain of an op amp determines the precision of the feedback system employing the op amp.

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Example 9.1

• The circuit is designed for a nominal of 10, i.e., 1+R1/R2=10. Determine the minimum value of A1 for a gain error of 1%.

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Small-signal bandwidth

• As the frequency of the frequency of operation increases, the open-loop gain begins to drop, creating larger errors in the feedback system.

• fu : unity-gain

• f3-dB : 3-dB frequency

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Example 9.2

• Assume the op amp is a single-pole voltage amplifier. If Vin is a small step, calculate the time required for the output voltage to reach within 1% of its final value. What unity-gain bandwidth must the op amp provide if 1+R1/R2 ≈10 and the settling time is to be less than 5ns. For simplicity, assume the low-frequency gain is much greater than unity.

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One-Stage Op Amps

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Example 9.3• Calculate the input common-mode voltage tange and the closed-

loop output impedance of the unity-gain buffer.

• Input common-mode voltage range- Vin,min=VCSS+VGS1

- Vin,max=VDD−|VGS3|+VTH1

• If each device has a threshold voltageof 0.7V and an overdrive of 0.3V for a 3-V supply- Vin,min=0.3+0.3+0.7=1.3 V- Vin,max=3-(0.3+0.7)+0.7=2.7 V

• The input CM range equals 1.4 V• Output impedance

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Telescope Cascode Op Amps• To achieve a high gain, the differential cascode topologies can be used.

- Low-frequency gain |Av| =

- but at the cost of output swing and adding poles.

• (a) The circuit providing a single-ended output suffers from a mirror pole at node X, creating stability issues.

• (b): the fully differential topology, the output swing is given by

• Another drawback:

The difficult in shorting their

inputs and outputs

(implement a unity-gain buffer)

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Example 9.4

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Example 9.5 Design of Fully Differential Telescope Op Amp

• Specification: VDD=3 V, differential output swing=3 V, power dissipation=10 mW, voltage gain=2000. Assume μnCox=60 μA/V2, μpCox=30 μA/V2, λn=0.1V−1, λp=0.2V−1 (for an effective channel length of 0.5 μm), γ=0, VTHN= |VTHP|=0.7 V

• Power budget: IM9=3 mA, IMb1+IMb2=330 μA• Output swing:

- Node X(Y) swing=1.5 V, M3-M6 in saturation- |VOD7|+|VOD5|+VOD3+VOD1+VOD9=1.5 V- Since M9 carrying largest current, VOD9≈0.5 V is chosen

- Since M5-M8 suffer from low mobility|VOD5|=|VOD7|≈0.3 V, VOD1=VOD3≈0.2 V

• W/L: By ID=(1/2)μCox(W/L)(VGS−VTH)2

(W/L)1−4=1250, (W/L)5−8=1111, (W/L)9=400• Gain: Av ≈ gm1[(gm3ro3ro1)|| (gm5ro5ro7)]

where λ∝1/L. We can therefore increase the width or length

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Example 9.5 Design of Fully Differential Telescope Op Amp

• Modulation:

Since M1~M4 appear in signal path for keeping minimum capacitance, we double the width and length of M5~M8 to increase ro (gm remains constant).

Choose (W/L)5−8=1111μm/1μm ⇒ Av ≈ 4000

• CM level:

Minimum allowable input CM level=VGS1+VOD9 =1.4 V.

• Bias:

Vb1, min=VGS3+VOD1+VOD9=1.6V

Vb2, max=VDD−(|VGS5|+|VOD7|)=1.7V

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Folded cascode• In order to alleviate the drawbacks of telescopic cascode op amps. The

primary advantage of the folded structure lies in the choice of the voltage levels because it does not stack the cascode transistor on the top of the input device.

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Folded cascode op amps

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Folded cascode op amp with cascode PMOS loads

• Current implementation: The current sources of the original folded cascade op are replaced by M5~M10.

• Maximum output swing: With proper choice of Vb1 and Vb2, The peak-peak swing on each side is

• Improvement: The swing is larger than that of the telescopic cascode op inducing by the large overdrive voltage of the tail current source.

• Note that M5 and M6 may require a

high overdrive voltage if their

capacitance contribution to nodes

X and Y is to be minimized.

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• Small-signal voltage gain

Halt-circuitSince (gm3+gmb3)−1||ro3 << ro1||ro5Iout ≈ ID1 ⇒ Gm ≈ gm1

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• Effect of device capacitance on the nondominant pole in telescopic and

folded cascode op amps

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A high-gain folded cascode op amp• Provides a higher gain because of the greater mobility of NMOS devices.• But at the cost of lowering the pole at the folding point

- M5 contributes substantial capacitance because its wide device to carry the large drain current

- M3 suffers from the low transconductance gm3, gmb3

• For comparable bias currents, M5-M6 in folded-cascode op with NMOS input pair may be several times wider than M5-M6 in folded-cascode op with PMOS input pair

ωp,X≈( Ctot,X/(gm3 + gmb3))-1=(gm3+gmb3)/Ctot,X

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Example 9.6: Design a folded-cascode op amp with an NMOS input pair

• Specifications: VDD=3 V, differential output swing =3 V, power dissipation =10 mW, voltage gain=2000. Assume μnCox=60 μA/V2, μpCox=30 μA/V2, λn=0.1 V−1, λp=0.2V−1 (for an effective channel length of 0.5 μm), γ=0, VTHN=|VTHP|=0.7 V

• Power budget:

• Output swing:

• W/L:

• CM level:

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Cascode op amps with dingle-ended output

• VX=VDD−|VGS5|−|VGS7|, limiting the maximum value of Vout to VDD−|VGS5|−|VGS7|+|VTH6| and wasting one PMOS threshold voltage in the swing

• To solve above issue M7 and M8 are biased at the edge of the triode region

• Disadvantages

- it provides only half the output voltage swing

- it contains a mirror pole at node X

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Triple Cascode

• Provides a gain on the order of (gmro)3/2

• But further limits the output swings

• With six overdrive voltages subtracted

from VDD in this circuit, it is difficult

to operate the amplifier from a

supply voltage or lower while

obtaining reasonable output swings

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Two-Stage Op Amps• The gain of one-stage topologies is limited to the input pair transconductance

and the output impedance

• Two-stage op amps consist of first stage providing a high gain and the secondproviding large swing

• Can we cascade more than two stages to achieve a higher gain?

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Simple Implementation of a Two-Stage Op Amp

• Gain

• Overall gain

• Output swing

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Two-Stage Op Amp Employing Cascoding

• To obtain a higher gain, the first stage incorporate cascodedevices

• The overall voltage gain is

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Two-Stage Op Amp with Single-Ended Output

• Note that if the gate of M1 is shorted to Vout to form a unity-gain buffer then the minimum allowable output level is equal to VGS1

+ VISS, severely limit the output swing

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Gain boosting

• Increasing the output impedance by feedback

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Gain boosting in cascode stage (Regulated cascode)

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Boosting Output Impedance of a Differential Cascode Stage

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Folded-Cascode Circuit Used as Auxiliary Amplifier

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Gain Boosting Applied to Both Signal Path and Load Devices

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Comparison of performance of various op amp topologies

Engineering

Operational Amplifiers I