35
ݢπำᖱက Chapter 10 Transistor amplifier design 10.1 Stability considerations unconditionally stable, conditionally stable, stability factor, source stability circle, load stability circle 10.2 Amplifier design for maximum gain unilateral case, bilateral case, simultaneously conjugate match, unilateral figure of merit 10.3 Constant gain circles unilateral case, bilateral case 10.4 Constant noise figure circles 10.5 Broadband amplifiers negative feedback amplifier, balanced amplifier, traveling wave amplifier 10.6 Small signal equivalent circuit models of transistors BJT, MESFET 10.7 DC bias circuits for transistors

Chapter 10 Transistor amplifier design 509/icerik... · 2016. 11. 28. · > b À 3 ± Chapter 10 Transistor amplifier design 10.1 Stability considerations unconditionally stable,

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  • � �

    Chapter 10 Transistor amplifier design

    10.1 Stability considerations

    unconditionally stable, conditionally stable, stability factor, source stability circle,

    load stability circle

    10.2 Amplifier design for maximum gain

    unilateral case, bilateral case, simultaneously conjugate match, unilateral figure

    of merit

    10.3 Constant gain circles

    unilateral case, bilateral case

    10.4 Constant noise figure circles

    10.5 Broadband amplifiers

    negative feedback amplifier, balanced amplifier, traveling wave amplifier

    10.6 Small signal equivalent circuit models of transistors

    BJT, MESFET

    10.7 DC bias circuits for transistors

  • � � � �

    10.1 Stability considerations

    Basics

    1. Unconditionally stable

    1

    12

    1

    11

    11

    1,1allfor

    12212211

    1221

    22

    22

    2

    11

    11

    122122out

    22

    122111in

    Ls

    SSSS

    SS

    SSk

    S

    SSS

    S

    SSS

    s

    s

    L

    L

    2. Conditionally stable: there exists some s and L, such that one or both of these

    conditions violated.

  • � � �

    Discussion

    1. Stability circles

    22

    11

    2112

    22

    11

    *

    2211s

    s

    11

    211222out

    22

    22

    2112

    22

    22

    *

    1122L

    L

    22

    122111in

    ,)(

    with plane-in

    circlestability11

    ,)(

    with plane-in

    circlestability11

    S

    SSr

    S

    SSC

    rCloadS

    SSS

    S

    SSr

    S

    SSC

    rCloadS

    SSS

    ss

    ss

    s

    s

    LL

    LL

    L

    L

  • � �

    2. If L=0 in=S11, the center of Smith chart represent a stable point if S11

  • � � � �

    4. Ex.10.1 A transistor has S11=0.894 -60.6 , S12=0.02 62.4, S21=3.122 123.6 ,

    S22=0.781 -27.6 at 2GHz

    2.0,7.4636.1

    5.0,7.4636.1

    1607.02

    1,16964.0

    1221

    22

    22

    2

    11

    12212211

    Ls

    LL

    rC

    rC

    SS

    SSkSSSS

  • � � � �

    10.2 Amplifier design for maximum gain

    Basics

    1.Unilateral case: S12=0

    stability condition: S11

  • � � � �

    2. Bilateral case (simultaneously conjugate match)

    *

    11222

    *

    22111

    22

    11

    2

    222

    22

    22

    2

    111

    1

    2

    1

    2

    11

    11

    122122out

    *

    L

    2

    2

    2

    2

    22

    22

    122111in

    *

    s

    12

    212

    12

    21

    2

    s11

    2

    2

    2122

    L22

    2

    2

    212

    *

    Lo

    *

    in

    ,

    1,1

    2

    4

    1

    2

    4

    1

    1kasgainstablemaximum:),1(

    1

    1

    1

    1

    1

    1

    1

    1

    ,smatchconjugateuslysimultaneooutputandinput

    1,1

    SSCSSC

    SSBSSB

    C

    CBB

    S

    SSS

    C

    CBB

    S

    SSS

    S

    SGKK

    S

    S

    SS

    SSGG

    Kif

    Ms

    s

    s

    ML

    L

    L

    MSG

    s

    L

    L

    s

    TMaxT

    ut

  • � � � �

    3. Unilateral figure of merit

    )1)(1(

    )1(

    1

    )1(

    1

    2

    22

    2

    11

    22122111

    22

    SS

    SSSSU

    UG

    G

    U U

    T

    Discussion

    1. Linear amplifier design procedure

    (1) if | 1, use input and output simultaneously conjugate matches for GTmax

    (2) if K

  • � ! " #

    2. Ex.10.2, A transistor has (Zo=50 ), S11=0.606 -155 , S12=0, S21=6 180 ,

    S22=0.48 -20 at 1GHz design an amplifier to give GTUmax.

    dB

    SS

    SG

    SS

    SS

    TU

    Ls

    69.189.733.13658.1

    48.01

    16

    606.01

    1

    1

    1

    1

    1

    2048.0,155606.0

    148.0,1606.0

    2

    2

    22

    22

    2

    212

    11

    max

    *

    22

    *

    11

    2211

    1: y=j1.7, or z=-j0.45

    2: z=j0.2

    3: z=-j1.38, or y=j0.48

    4: y=-j0.16

  • $ % & $ %

    3. Ex.10.2 A transistor has (Zo=50 ), S11=0.614 -167.4 , S12=0.046 65 ,

    S21=2.187 32.4 , S22=0.716 -83 at 6GHz design an amplifier to give Gtmax

    | 1

    dBKKS

    SG

    C

    CBB

    C

    CBB

    TMax

    Ms

    ML

    58.14728.28)1(

    48.849011.02

    4

    4.1678673.02

    4

    2

    12

    21

    1

    2

    1

    2

    11*

    Lout

    2

    2

    2

    2

    22*

    sin

  • ' ( ) ' '

    1: MS=0.8673 169.76

    2: y=-j2.7

    3: ML=0.9011 84.48

    4: z=j3.4

  • * + , * -

    4. Ex.10.4 transistor A: S11=0.45 150 , S12=0.01 -10 , S21=2.05 10 , S22=0.4

    -10 transistor B: S11=0.641 -171.3 , S12=0.057 16.3 , S21=2.058 28.5 ,

    S22=0.572 -95.7 compare their Us

    dBG

    GdB

    dBG

    GdB

    G

    G

    G

    G

    UG

    G

    U

    U

    U

    SS

    SSSSU

    B

    U

    T

    A

    U

    T

    B

    U

    T

    A

    U

    T

    U

    T

    A

    9976.08948.0

    0238.0476.0

    2582.18238.0

    0055.19891.0

    )1(

    1

    )1(

    1

    1085.0

    00551.0

    )1)(1(

    22

    2

    22

    2

    11

    22122111

    B

  • . / 0 . 1

    10.3 Constant gain circles

    Basics

    1. Unilateral case (S12=0)

    2

    22

    2

    22

    2

    22

    *

    22

    LL

    max

    2

    11

    2

    11

    2

    11

    *

    11

    ss

    max

    2

    22

    max2

    22

    2

    2

    11

    max2

    11

    2

    02

    22

    2

    2

    212

    11

    2

    )1(1

    )1(1,

    )1(1

    incirclesgainconstant

    )1(1

    )1(1,

    )1(1

    incirclesgainconstant

    1

    1,

    1

    1,

    1

    1,

    1

    1

    1

    1

    1

    1

    Sg

    SgR

    Sg

    Sgd

    RdplaneG

    Gg

    Sgs

    SgsRs

    Sgs

    Sgds

    RsdsplaneG

    Ggs

    SG

    SG

    SG

    SG

    GGGS

    SS

    G

    L

    L

    L

    L

    LL

    LL

    L

    LL

    s

    s

    s

    L

    L

    L

    Ls

    s

    s

    s

    Ls

    L

    L

    s

    s

    TU

  • 3 4 5 3 6

    2. Bilateral case (S12 0)

    (1) Unconditionally stable case, use GP or GA

    max

    2

    12

    21

    max

    2

    2112

    max

    *

    1122222

    22

    22

    21122112

    22

    22

    *

    2

    LL2

    L11

    2

    L22

    2

    2

    21

    22

    11

    22

    1221112

    L22

    2

    2

    212

    )1(

    )1(1

    ,)(1

    21,

    )(1

    incirclesgainconstant1

    1

    11,

    1

    1

    1

    1

    TPP

    PP

    P

    P

    PP

    P

    P

    PP

    PP

    L

    P

    PP

    L

    L

    L

    Lim

    L

    im

    P

    GKKS

    SGG

    KKSS

    gg

    R

    SSCSg

    gSSgSSKR

    Sg

    Ccc

    RcplaneSS

    g

    gSG

    S

    S

    S

    SSS

    SSG

  • 7 8 9 7 :max

    2

    12

    21

    max

    2

    2112

    max

    *

    2211122

    11

    22

    21122112

    22

    11

    *

    1

    ss2

    s22

    2

    s11

    2

    2

    21

    11

    22

    11

    1221222

    2

    212

    S11

    2

    )1(

    )1(1

    ,)(1

    21,

    )(1

    incirclesgainconstant1

    1

    11,

    1

    1

    1

    1

    TAA

    AA

    s

    A

    AA

    s

    A

    As

    ss

    S

    A

    AP

    s

    s

    s

    sout

    out

    S

    A

    GKKS

    SGG

    KKSS

    gg

    R

    SSCSg

    gSSgSSKR

    Sg

    Cgc

    RcplaneSS

    g

    gSG

    S

    S

    S

    SSSS

    SG

  • ; < = ; >

    (2) Potentially unstable case

    use GP to plot constant gain circles in L-plane and plot load stability circles

    properly select L, calculate s= in

    use GA to plot constant gain circles in s-plane and plot source stability circles

    properly select s, calculate L= out

    Discussion

    1. Ex. 10.5 A MESFET with S-parameters (Zo=50 )

    S11 S21 S12 S22

    3GHz 0.8 -90 2.8 100 0 0.66 -50

    4GHz 0.75 -120 2.5 80 0 0.6 -70

    5GHz 0.71 -140 2.3 60 0 0.68 -85

    plot constant gain circles @4GHz for GL=0, 1dB, and Gs=2, 3dB design an

    amplifier of 11dB gain

    dBGdBSG

    dBS

    GdBS

    G

    GGGS

    SS

    G

    TU

    Ls

    Ls

    L

    L

    s

    s

    TU

    47.1392.196.759.3,96.725.6

    92.15625.11

    1,59.3228.2

    1

    1GHz,4@

    1

    1

    1

    1

    max

    2

    210

    2

    22

    max2

    11

    max

    02

    22

    2

    2

    212

    11

    2

  • ? @ A ? B

    chose GTU(4GHz) 11dB=2dB+8dB+1dB to design the circuit

    GTU(3GHz)=7.3GTU(5GHz)=6.96dB

    44.0

    303.0,

    7064.0

    7052.0

    64.0

    8064.0

    10

    26.11

    294.0

    166.0,

    120627.0

    120706.0

    691.0

    785.0

    58.12

    23

    LLLL

    s

    RdgdB

    dBG

    RdsgsdB

    dBGs

  • C D E C F

    2. Ex. 10.6 A GaAs FET with S-parameters (Zo=50 , 1GHz) S11=2.27 -120 , S21=4

    50 , S12=0, S22=0.6 -80

    (1) calculate Zin, plot unstable region in s-plane

    (2) plot constant gain circles for Gs=3, 5dB

    (3) find Zs for Gs=3dB with maximum degree of stable, determine ZL to give maximum

    GL, then design the amplifier

    (4) calculate GTU

    unstablebe to5.24

    235.240

    012027.2)1( 11

    Rs

    jZinZZin

    ZZinS in

  • G H I G J

    (2)

    dBGS

    G

    jZSFor

    jZssA

    TULMAX

    LL

    175056.142,56.11

    1

    5.5127806.0:CselectGL,maximum

    25507624.0:

    Rspossiblemaximumagivetofor ZsASelect(3)

    2

    2

    22

    *

    22

    2698.0

    2174.0,

    1204.0

    12045.0

    3.8

    13.13

    23

    16.35sRdsgs

    dB

    dBGs

  • K L M N L

    3. Ex. 10.7 A GaAs FET with S-parameters (Zo=50 , 6GHz) S11=0.641 -171.3 ,

    S21=2.058 28.5 , S12=0.057 16.3 ,S22=0.572 -95.7 design an amplifier to

    give GP=9dB

    6.17563.0:6.17563.05036.0:Cselect

    43.0,1045.0

    planeincirclesgainconstant9

    38.11)1(3.01.5K

    sL

    LL

    2

    12

    21

    A

    Rc

    RcdBG

    dBKKS

    SGG

    in

    pp

    ppP

    PMaxP

  • O P Q R O

    4. Ex. 10.8 A GaAs FET with S-parameters (Zo=50 , 8GHz) S11=0.5 -180 ,

    S21=2.5 70 , S12=0.08 30 , S22=0.8 -100 design an amplifier to give

    GP=10dB

    3.17952.0:3.17952.0971.0:Cselect

    4733.0,2.9757.0

    planeincirclesgainconstant10

    3388.0,9717.1Ccirclestabilityload

    998.0,6.17067.1Cscirclestabilitysource2228.0.3990K

    sL

    LL

    L

    A

    Rc

    RcdBG

    r

    rs

    in

    pp

    ppP

    L

  • S T U V V

    5. Ex. 10.9 A BJT with S-parameters (Zo=50 , 750MHz) S11=0.277 - 59 , S21=1.92

    64 , S12=0.078 93 , S22=0.848 -31 design an amplifier to give GTmax

    6. Ex. 10.10 use the BJT in Ex.10.9 design an amplifier to give GP=10dB,

    determine Gs, GL for GPmax

    °3.8530.9511=?3510.7298=

    matchconjugateuslysimultaneo3242.0,0325.1|G|

    MLMS

    Ss

    LL

    s

    L

    LL

    1357298.0

    84.339511.08.12

    45.563455.0:

    4.563455.03456.0:Cselect

    2142.0,8.3378.0

    planeincirclesgainconstant10

    M

    MMAXP

    in

    pp

    ppP

    dBG

    A

    Rc

    RcdBG

  • W X Y Z [

    10.4 Constant noise figure circles

    Basics

    amplifier port - two a For

    1

    )1(,

    1

    circlefigurenoiseconstant

    parameterfigurenoise:1/41

    N

    r transistoofresistancenoiseequivalent,,:parameternoise

    1)1(

    4

    2

    2

    0

    min

    2

    2

    min

    22

    2

    0

    min

    2

    min

    N

    NNNR

    NC

    RC

    ZR

    FF

    RYF

    Z

    RFYY

    G

    RFF

    opt

    NF

    opt

    NF

    NFNFs

    opt

    ns

    opts

    nopt

    opts

    optsnopts

    s

    n

  • \ ] ^ _ `

    Discussion

    1. Ex. 10.11 A BJT with S-parameters (Zo=50 , 1GHz) S11=0.707 -155 , S21=5

    180 , S12=0, S22=0.51 -20 , Fmin=3dB, Rn=4 , opt= 0.45 180 design an

    amplifier to give GT=16dB, F

  • a b c d e

    2. Ex. 10.12 A GaAs FET with S-parameters (Zo=50 , 4GHz) S11=0.6 -60 ,

    S21=1.9 81 , S12=0.05 26 , S22=0.5 -60 , Fmin=1.6dB, Rn=20 , opt= =0.62

    100 (1) assume S12=0, design an amplifier to give GTUmax, F

  • f g h i j

    8.67504.08.67504.090535.0

    234.0,7.64527.08G

    planeincirclesgainconstantGuse)2(

    A

    ssA

    Louts

    ss

    ss

    select

    RcdB

    Rc

    3. Low noise amplifier design procedure:

    if unconditionally stable, use GA constant gain circles and constant noise figure

    circles to determine s , and L= *out.

    if potentially unstable, consider source and load stability circles in addition.

  • k l m n op , 1GHz) S11=0.6 -130 , S21=7.12

    86 , S12=0.039 35 , S22=0.5 -38 , Fmin=1.3dB, Rn=8 , opt= =0.06 49

    design an amplifier to give 16dB power gain, F

  • q r s t u

    10.5 Broadband amplifiers

    Basics

    1. Negative feedback amplifier

    ''

    1'),1('

    )1(1

    1

    1

    1

    00

    0

    000

    0

    0

    0

    0

    0

    cc

    cc

    c

    V

    v

    v

    i

    V

    fAfA

    A

    AAAff

    Af

    fj

    A

    A

    G

    fc

    fj

    AAv

    A

    A

    V

    VG

  • v w x y z

    2. Balanced amplifier

    { hybrids and amplifier gain.

  • | } ~ }

    2. Traveling wave amplifier (distributed amplifier) TEM line “extreme wide operation

    bandwidth”

  • 10.6 Small-signal equivalent circuit models of transistor

    Basics

    1. BJT

  • 2. MESFET

    powergate

    fgate

  • 10.7 DC bias circuits for transistors

    Discussion

    1. Resistive bias with voltage feedback for BJT,inchanges tosensitivelesshave

    1,

    1

    ,

    ,

    BEE

    BBEcc

    B

    BEccE

    CBEE

    BEBBE

    VIto

    RRcVV

    RRc

    VVI

    IIIIIc

    VRIRcIVcc

  • 2. Bias circuit with emitter bypassed resistor for BJT

    inth

    cc

    cECBth

    BEE

    thEBEth

    thE

    BEccE

    BEEEth

    EEBEBthTh

    THCCTH

    RR

    V

    VVV

    VIto

    RRVV

    RR

    VVI

    VIRR

    RIVIRV

    RR

    RRRV

    RR

    RV

    20%~15%Vthusually

    swingoutputitedlim,

    ,inchanges tosensitivelesshave

    1,

    1

    ,)1

    (

    ,21

    21

    21

    2

  • 3. Unipolar bias circuits for MESFET