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CONTREX/ECSI/D/D6.3.2 Public
Dissemination Report (Initial)
Page 1
Public
FP7-ICT-2013- 10 (611146) CONTREX
Design of embedded mixed-criticality CONTRol
systems under consideration of EXtra-functional
properties
Project Duration 2013-10-01 – 2016-09-30 Type IP
WP no. Deliverable no. Lead participant
WP6 D6.3.2 ECSI
Dissemination Report (Initial)
Prepared by Adam Morawiec (ECSI)
Issued by ECSI
Document Number/Rev. CONTREX/ECSI/D/D6.3.2/1.0
Classification CONTREX Public
Submission Date 2014-06-23
Due Date 2014-06-31
Project co-funded by the European Commission within the Seventh Framework Programme (2007-2013)
© Copyright 2014 OFFIS e.V., STMicroelectronics srl., GMV Aerospace and Defence
SA, Cobra Telematics SA, Eurotech SPA, Intecs SPA, iXtronics GmbH, EDALab srl, Docea
Power, Politecnico di Milano, Politecnico di Torino, Universidad de Cantabria, Kungliga
Tekniska Hoegskolan, European Electronic Chips & Systems design Initiative, ST-Polito
Societa’ consortile a r.l..
This document may be copied freely for use in the public domain. Sections of it may
be copied provided that acknowledgement is given of this original work. No responsibility is
assumed by CONTREX or its members for any application or design, nor for any
infringements of patents or rights of others which may result from the use of this document.
CONTREX/ECSI/D/D6.3.2 Public
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History of Changes
ED. REV. DATE PAGES REASON FOR CHANGES
AM 0.1 2014-05-14 18 Initial version
SR 0.2 2014-05-14 23 Input OFFIS
AM 0.3 2014-06-19 25 Inputs from partners integrated, ECSI activities added
AM 0.4 2014-06-19 31 Partners’ input added
AM 0.5 2014-06-20 32 Partner’s input added
AM 0.6 2014-06-23 31 All partners’ input integrated, consortium review
version
KG 0.7 2014-06-23 31 Removed submitted papers and articles. Added
accepted papers of MCSDIA special session at DSD.
AM,
SR 1.0 2014-06-23 31 Late additions, final review and release
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Contents
1 Introduction ........................................................................................................................ 4
2 Consortium-Level Dissemination Activities ...................................................................... 5 2.1 DATE Conference and Booth at the Exhibition .......................................................... 5 2.2 DATE Workshop: 3PMCES ........................................................................................ 5 2.3 Cyber-Physical Systems: Uplifting Europe's innovation capacity Conference ........... 7 2.4 2
nd Workshop on Mixed-Criticality Integration .......................................................... 7
2.5 ESLsyn Conference ..................................................................................................... 9 2.6 DAC Workshop: System to Silicon Performance Modeling and Analysis ............... 10 2.7 Organisation of a Special Session on Mixed Criticality System Design,
Implementation and Analysis (MCSDIA) ............................................................................ 11
2.8 Dissemination Material and Means ........................................................................... 14 3 Partner-Level Dissemination Activities ........................................................................... 17
3.1 OFFIS E.V. ................................................................................................................ 17
3.2 STMICROELECTRONICS, ST-I ............................................................................. 19 3.3 GMV AEROSPACE AND DEFENCE SA UNIPERSONAL .................................. 19 3.4 COBRA TELEMATICS............................................................................................ 19 3.5 EUROTECH .............................................................................................................. 20
3.6 INTECS ..................................................................................................................... 21 3.7 iXtronics GmbH ........................................................................................................ 22
3.8 EDALab ..................................................................................................................... 23 3.9 DOCEA POWER ...................................................................................................... 24 3.10 POLITECNICO DI MILANO ............................................................................... 25
3.11 POLITECNICO DI TORINO ................................................................................ 27 3.12 UNIVERSIDAD DE CANTABRIA ...................................................................... 28
3.13 KUNGLIGA TEKNISKA HOEGSKOLAN ......................................................... 29 3.14 ST-POLITO ........................................................................................................... 30
4 Relations to Other Projects ............................................................................................... 31 5 Summary .......................................................................................................................... 32
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1 Introduction
This document summarises all dissemination activities that were undertaken by the
CONTREX project consortium as a whole and by each individual partner of the consortium in
the first 9 months of project execution.
From the very beginning the CONTREX consortium initiated dissemination activities that,
due to the initial phase of the project, were mainly oriented at making the community aware
of the project, its objectives and expected results. This first phase was also used to identify
related running projects with similar objectives and to establish links with some of them.
Having this objective in mind a common presentation was prepared for the DATE Workshop
3PMCES in March 2014 between 4 projects: DREAMS, PROXIMA, CONTREX and
MiltiPARTES. This event was also useful to establish connections with related projects like
RELY (focusing on performance and aging aspects of systems) and the CRAFTERS and
PAPP projects focusing on execution performance and eSW porting problems on multi-core
platforms.
The CONTREX Consortium also acted pro-actively and organized a very first workshop at
the DAC Conference (June 2014) on System to Silicon Performance Modeling and Analysis.
These initial activities created a very good basis for collaboration with other projects and for
establishing relations with the community (research partners and potential industrial
customers) of the CONTREX results.
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2 Consortium-Level Dissemination Activities
2.1 DATE Conference and Booth at the Exhibition
The European Project Cluster on Mixed-Criticality Systems consisting of the DREAMS,
PROXIMA, MultiPartes, and CONTREX projects had a joint booth at the DATE 2014
Conference in Dresden. From 25th to 27th of March the projects presented their self to a
broad audience and discussed the addressed objectives, research goals and ideas with
interested exhibition visitors. The joint booth also fostered discussion and contacts between
DREAMS, PROXIMA and CONTREX project participants and the coordinators of these
projects.
Figure 1: CONTREX, DREAMS, PROXIMA and MultiPARTES Booth at the DATE Conference
Exhibition
2.2 DATE Workshop: 3PMCES
On March 28th 2014 the 3PMCES Friday workshop at the DATE 2014 conference was
organized by ECSI to enable CONTREX to present its approach and expected results to a
wider audience. The CONTREX project contributed to this workshop with an overview
presentation, also covering introduction of the European Project Cluster on Mixed-Criticality
Systems.
The workshop enabled to establish relation between CONTREX (and the MCC Cluster) with
other related European projects:
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CRAFTERS (ConstRaint and Application driven Framework for Tailoring Embedded
Real-time Systems) – ARTEMIS 295371 (coordinator: Technical University of
Tampere)
PAPP (Portable and Predictable Performance on Heterogeneous Embedded
Manycores) – ARTEMIS 295440 (coordinator: SICS)
RELY (Design for RELIABILITY of SoCs for Applications like Transportation,
Medical, and Industrial Automation) – CATRENE Project (coordinator TU
Muenchen)
OpenES (Open ESL Technologies for Next Generation Embedded Systems) –
CATRENE Project (coordinator: STMicroelectronics)
Besides the presentation in the regular session, CONTREX also presented the poster in the
special poster session of the event.
Participation profile:
Total participation: 34
Industry: 9
University/Research: 25
Aalto University, Barcelona Supercomputing Center and IIIA-CSIC, CEA LIST, DTU,
Fujitsu Laboratories, Glasgow Caledonian University, GN ReSound ApS, Kontron, LIP6,
Mälardalen University, McGill University, Newcastle University, OFFIS, SICS, Tampere
University of Technology, Technical University of Denmark, Technische Universität
München, Universitat Politècnica de Catalunya, Universität Siegen, University of Cantabria,
University of Erlangen-Nuremberg, University of Grenoble, University of Hertfordshire,
University of Southampton, University of Tokyo, University of Twente, University
Oldenburg
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Main Impact:
Presentation of CONTREX vision, objectives and expected results to the audience
Establishment of relations with other R&D projects
Relations to some industry partners: Kontron, CEA, Fujitsu, ReSound, …
It is worth to mention that this workshop was the second best populated workshop at DATE
this year with 34 participants (the best workshop attracted 35 participants).
2.3 Cyber-Physical Systems: Uplifting Europe's innovation capacity Conference
The Conference on Cyber-Physical Systems: Uplifting Europe's innovation capacity was held
in October 29-30, 2013 in Brussels, Belgium and focused to bring together key actors in EU
research and innovation to discuss strategies and stimulate community building in the area of
Cyber-Physical Systems. Not neglecting the importance of technologies, focus is on European
industrial competitiveness and how to reinforce it through research and innovation.
On the second day of the conference (see Figure 2) which was devoted to parallel breakout
workshops, Kim Gruettner from OFFIS did a presentation about CONTREX at the workshop
“Mixed Criticality Systems – platforms for the future” (please see more information at:
http://www.amiando.com/cps-conference.html?page=973125).
The CONTREX presentation highlighted the objectives and main challenges of the project by
emphasizing the optimization of extra-functional properties (timing, power, temperature and
reliability requirements) for multi-core execution platforms.
Figure 2: CONTREX presentation at the workshop on Mixed Criticality Systems – platforms for the
future.
2.4 2nd Workshop on Mixed-Criticality Integration
After a successful 2013 edition, the HiPEAC 2014 conference in Vienna hosted the second
edition of the workshop on mixed-criticality integration entitled “2nd Workshop on
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Integration of Mixed-criticality Subsystems on Multi-core and Manycore Processors”. The
technical program covered two days.
The first day was devoted to ongoing projects, which presented their main results, with a
focus on their impact on the future design of MCS; the second day was devoted to presenting
the goals, objectives and approaches of recently accepted projects. Overall, the audience
enjoyed a good balance between results from currently running projects and new challenges to
be addressed by just-started projects.
Figure 3: (From left to right) Salva Trujillo (IK4-IKERLAN, MultiPARTES coordinator),
Kim Grüttner (OFFIS, CONTREX coordinator), Francisco Cazorla (BSC, PROXIMA
coordinator) and Roman Obermaisser (Univ. Siegen, DREAMS coordinator)
during a break
An excellent representation of the European research projects in the field, under both the FP7
and Artemis programs, was present at the workshop: RECOMP, parMERASA, T-CREST,
PROARTIS, MultiPARTES, CERTAINTY, CRYSTAL, PROXIMA, CONTREX, DREAMS
and EMC2. There were talks focusing on the following topics: Multi-Processor Systems-on-a-
Chip (MPSoCs) for mixed-criticality applications, hypervisors and operating systems for
MPSoCs, hard real-time guarantees and certification aspects, model-driven engineering tools
for effort reduction, applications in automotive, avionics, railway, energy and industrial
control and existing future research directions.
Both day’s sessions ended with very fruitful panel discussions with recognized experts in the
field, moderated by Salva Trujillo (IK4-IKERLAN). The first panel was held on the
challenges of the road to certification of mixed-criticality systems with panelists: Roman
Obermaisser (University of Siegen), Michael Paulitsch (Airbus Group), Rafael Zalman
(Infineon), Jon Perez (IK4-IKERLAN),Christian El Salloum (AVL) and Alfons Crespo
(Polytechnic University of Valencia).
The second panel was on many-core mixed-criticality systems with panelists: Francisco J.
Cazorla (BSC), Alan Burns (University of York), Mathieu Patte (Astrium) and Jaume Abella
(BSC).
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Almost 80 people from at least 16 countries – representing Europe and Asia – attended the
workshop. The agenda and the workshop material are available at
https://alfresco.dit.upm.es/multipartes/eventsInfo/HiPEAC2014.html.
A new edition is planned in 2015. More pictures from the event are available via
https://twitter.com/FP7MultiPARTES
2.5 ESLsyn Conference
The 4th
edition of the ESLsyn Conference was organized by ECSI (in collaboration with
OFFIS and University of Oldenburg) in San Francisco, CA, USA on May 31 – June 1, 2014.
The conference was co-located with 51st DAC Conference. The General Chair was Prof.
Achim Rettberg, University of Oldenburg, Germany, the Program Chairs: Christian Haubelt,
Univeristy of Rostock and Benjamin Carrion Schafer, The Hong Kong Polytechnic
University.
ESLsyn is a forum to discuss automated system design methods that enable efficient
modeling of systems to provide the capability to synthesize HW platforms and embedded
software with particular aspects related to synthesis. The main aim of the conference is to
bring research institutions and industrial partners in the domain of ESL synthesis closer
together by informing practitioners of the latest theoretical results, and challenging
theoreticians with complex industrial problems. ESLsyn wants to provide a discussion
platform for experience exchange between providers of synthesis technology and industry
users, but also will be a forum to discuss scientific concepts and paradigms for the future
evolution of synthesis methods. It therefore welcomes both academic and industrial
participants.
CONTREX presented a paper:
Considering Variation and Aging in a Full Chip Design Methodology at System Level,
Domenik Helms, Kim Gruettner, Reef Eilers, Malte Metzdorf, Kai Hylla, Frank
Poppen (OFFIS - Institute for Information Technology, Germany) and Wolfgang
Nebel (Carl von Ossietzky University Oldenburg, Germany).
and contributed to the panel
‘Do we have all the necessary ingredients (formalisms, languages, models, flows,
tools) to practically apply system/high-level synthesis?’.
A full program and slides are available from the ECSI website: www.ecsi.org/eslsyn
A new edition of ESLsyn is planned for 2015 with a stronger involvement of industry users
and EDA companies acting in the high-level synthesis domain.
Participation profile:
Total participation: 28
Industry: 10
University/Research: 18
Agilent, Axis, C-Lab, EPFL, FLIR, Huawei, INRIA, NEC, OFFIS, STW, Synopsys, TU
Chemnitz, TU Eindhoven, U Amsterdam, U Lund, U Calgary, U Rostock, U Hong Kong
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Main Impact:
Presentation of CONTREX technical paper
Relations to some industry partners: Huawei, NEC, Agilent, FLIR, Axis,
2.6 DAC Workshop: System to Silicon Performance Modeling and Analysis
Workshop scope and objective: The integration of complex heterogeneous electronic systems
composed of SW and HW requires not only a proper handling of system functionality, but
also an appropriate expression and analysis of various extra-functional (non-functional)
properties and quality attributes of the system like timing, caching, non-determinism,
probabilistic effects, power consumption, thermal behavior, reliability, cost and others.
The workshop addresses cross-domain aspects related to the construction of design and
verification framework encompassing methodology, interoperable tools, flows, interfaces and
standards that will enable for formalization, specification, annotation and refinement of
functional and extra-functional properties as well as quality features.
Several research and industry efforts address (parts of) the problem, there is a need of
community-wide cooperation to establish common understanding, development directions
and proof of applicable solutions. This event will help to create the basis for communication
between main actors from system and microelectronics industry, EDA and research.
CONTREX presentation:
Modelling, Simulation and Analysis of Mixed-Criticality Systems Under
Consideration of Extra-functional Properties, Kim Grüttner (OFFIS, Germany)
Abstract: With the predicted device, core and multicore scaling, a recent study revealed
that regardless of chip organization and topology, multicore scaling is power limited. It
has been predicted that at 22 nm, 21% of a fixed-size chip must be powered off, and at
8 nm, even more than 50%. For mixed-criticality systems, this is of major importance,
because safety critical applications cannot be switched on and off or even migrated
during runtime. Power and temperature management must guarantee freedom from
interference with other applications under all possible conditions. For this reason, the
extra-functional properties need to be modelled and analyzed at the system and
platform level, because they can strongly affect the overall quality of service
(performance, battery lifetime) or even cause the system to fail meeting its real-time
and safety requirements. In mixed-criticality systems, cross-application interferences
with respect to timing, power and thermal properties need to be captured as well.
In this talk, we present a SystemC-based simulation framework for capturing extra-
functional properties in virtual prototyping simulations, currently under development in
the CONTREX project. This covers the specification of platform properties (extra-
functional model) as well as the dynamic capturing, processing, and extraction of
power/temperature information during the simulation. Especially closing the loop back
to the application and run-time services is an important feature for complex hardware
platforms and software stacks. As an example, we will present a battery-powered
mixed-critical avionics system, running a safety-critical flight control application and a
performance critical image processing application on the same multicore System on
Chip.
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The workshop material will be available soon at the ECSI web site: www.ecsi.org
Participation profile:
Total registrations: 75
Total participation: 30
Industry: 38 (registered)
University/Research: 37 (registered)
Advanced Micro Devices, Ain Shams University, Ajou University, Altera, AMD, Arizona
State University, ARM, ARM Norway AS, Axis Communications , Boston University,
Broadcom Corporation, BroadPak, Cadence Design Systems, Carnegie Mellon University,
CEA, CERN, CJSC Babilon-Mobile, C-LAB, Concordia University, CSR, DelfMEMS,
Department of Defense, Ericsson AB, ETH Zurich, Fraunhofer IIS, George Mason
University, Huawei Technologies, IISc, IIT Kanpur, Imec, Intel, ITRI, KAIST, Marvell,
National Taiwan University, New York University, Northeastern University, Oracle, Pacific
Northwest National Laboratory, Panasonic, Politecnico di Milano, Qualcomm Technologies
Inc, Rambus, Raytheon, Samsung Electronics, Sapienza University of Rome, Siemens,
STMicroelectronics, Synopsys, THALES, The University of Hong Kong, The University of
Texas at Austin, Tokyo Institute of Technology, UCLA, Universidade Federal do Rio Grande
do Sul, University of Calgary, University of Frankfurt, University of Illinois at Urbana-
Champaign, University of Wisconsin Madison, Utah State University, Virginia Tech., ZTE
Corporation
Main Impact:
CONTREX presentation in the international (world-wide) context: new contacts in
large industry, exposure to new research teams and potential users/adopters of the
CONTREX technology
Alignment with the OpenES project (this workshop was jointly organized by OpenES
and CONTREX)
Good contacts with EDA companies present
2.7 Organisation of a Special Session on Mixed Criticality System Design, Implementation and Analysis (MCSDIA)
The MCSDIA special session of the 17th Euromicro Conference on Digital Systems Design
(DSD 2014) has been organized by Eugenio Villar (UC) and Kim Grüttner (OFFIS). It will
take place August 27-29 2014 in Verona, Italy. The call for paper can be found below or at:
https://contrex.offis.de/home/images/meetings/dsd2014/CfP_DSD_MCSDIA_extended.pdf
We have invited the members of our industrial advisory board as reviewers:
Jean-Loup Terraillon, ESA, The Netherlands
Andreas von Schwerin, Siemens AG, Germany
Knut Hufeld, Infineon Technologies AG, Germany
and the coordinators of the other MCC projects:
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Roman Obermaisser, University of Siegen, Germany (DREAMS)
Francisco J. Cazorla, Supercomputing Center and IIIA-CSIC, Spain
(PROXIMA)
Knut Hufeld, Infineon Technologies AG, Germany (EMC2)
The following papers from EMC2, DREAMS and PROXIMA have been submitted, reviewed
and accepted for presentation:
Daniel Muench, Michael Paulitsch, Michael Honold, Wolfgang Schlecker and Andreas
Herkersdorf: Iterative FPGA Implementation Easing Safety Certification for
Mixed-Criticality Embedded Real-Time Systems
Jon Perez, David Gonzalez, Carlos Fernando Nicolas, Ton Trapman and Jose Miguel
Garate: A safety certification strategy for IEC-61508 compliant industrial mixed-
criticality systems based on multicore partitioning
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster
and Francisco J Cazorla: Probabilistic Timing Analysis and Its Impact on Processor
Architecture
Roman Obermisser, Zaher Owda, Mohammed Abuteir, Hamidreza Ahmadian and
Donatus Weber: End-to-End Real-Time Communication in Mixed-Criticality
Systems Based on Networked Multicore Chips
The special session will be moderated by Eugenio Villar (U Cantabria) and Kim Grüttner
(OFFIS).
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2.8 Dissemination Material and Means
2.8.1 Web site
The project web site is available at: https://contrex.offis.de
Also ECSI hosts the CONTREX Project site on its own site www.ecsi.org/contrex:
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2.8.2 Poster
2.8.2.1 CONTREX Project Overview Poster
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2.8.2.2 Poster at DAC'14 (WIP Track)
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3 Partner-Level Dissemination Activities
3.1 OFFIS E.V.
3.1.1 Publications
2014
Kim Grüttner, Philipp A. Hartmann, Tiemo Fandrey, Kai Hylla, Daniel Lorenz, Stefan
Stattelmann, Björn Sander, Oliver Bringmann, Wolfgang Nebel, Wolfgang Rosenstiel,
An ESL Timing & Power Estimation and Simulation Framework for
Heterogeneous SoCs, Proceedings of International Conference on Embedded
Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV), Samos,
Greece, July 14-17, 2014.
Domenik Helms, Kim Grüttner, Reef Eilers, Malte Metzdorf, Kai Hylla, Frank
Poppen, Wolfgang Nebel, Considering Variation and Aging in a Full Chip Design
Methodology at System Level, Poster at DAC'14 (WIP Track), San Francisco, CA,
USA, June 01-05, 2014.
Sören Schreiner, Kim Grüttner, Sven Rosinger, Achim Rettberg. Autonomous flight
control meets custom payload processing: A mixed-critical avionics architecture
approach for civilian UAVs, In SORT 2014 - 5th IEEE Workshop on Self-Organizing
Real-Time Systems, Reno, Nevada, USA, June 2014.
Salvador Trujillo, Roman Obermaisser, Kim Grüttner, Francisco J. Cazorla, Jon Perez.
European Project Cluster on Mixed-Criticality Systems, In 3PMCES workshop -
Performance, Power and Predictability of Many-Core Embedded Systems, Dresden,
March 2014
3.1.2 Presentations at Conferences / Workshops
2013
Kim Gruettner. “Design of embedded mixed-criticality CONTRol systems under
consideration of EXtra-functional properties”, Conference on Cyber-Physical
Systems: Uplifting Europe's innovation capacity, Belgium, Brussels, October 29-30,
2013.
2014
Kim Grüttner, Project overview poster at HiPEAC '14 EU project poster session,
January 2014, Vienna, Austria
Kim Grüttner, CONTREX project presentation, MultiPARTES - Multi-cores
Partitioning for Trusted Embedded Systems - 2nd International workshop on the
Integration of mixed-criticality subsystems on multi-core and manycore processors ,
January 2014, Vienna, Austria
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Philipp A. Hartmann, Are the results of the EU research projects really sharable
and exploitable by the industrial and academic communities?, Panellist at 5th
Workshop on Parallel Programming and Run-Time Management Techniques for
Many-core Architectures and 3rd Workshop on Design Tools and Architectures for
Multicore Embedded Computing Platforms (PARMA-DITAM 2014), January 2014,
Vienna, Austria
Philipp A. Hartmann, Modelling, simulation and analysis of extra-functional
properties of multi-core platforms in multi-application scenarios, 6th Workshop
on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO’14),
January 2014, Vienna, Austria
Kim Grüttner, What is still needed to have a reliable embedded system
development ecosystem in place?, Panellist at Performance, Power and Predictability
of Many-Core Embedded Systems (3PMCES) Friday workshop at DATE’14, March
28, 2014, Dresden, Germany
3.1.3 Exhibitions and Demonstrations
2014
DATE'14: European Project Cluster on Mixed-Criticality Systems at DATE'14
Exhibition, March 2014
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3.2 STMICROELECTRONICS, ST-I
No specific dissemination activities in this reporting period.
3.3 GMV AEROSPACE AND DEFENCE SA UNIPERSONAL
No specific dissemination activities in this reporting period.
3.4 COBRA TELEMATICS
No specific dissemination activities in this reporting period.
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3.5 EUROTECH
3.5.1 Presentations at Conferences / Workshops
Marco Carrer, Paul Pishal, “Internet of Things: In Motion”, JavaOne, San Francisco,
2013.
Marco Carrer, “Eclipse M2M Technologies in Action”, EclipseCON 2014.
o https://www.youtube.com/watch?v=PXlDJMK7yqg
o https://www.youtube.com/watch?v=UELw9QrlDRI
o https://www.youtube.com/watch?v=EA5j7c2SgqQ
Pierre Pitot, “Eclipse M2M Technologies in Action”, EclipseCON France 2014.
Cristiano De Alti, “Eclipse Kura: an introduction”, Eclipse Day Florence, 2014.
Marco Carrer, “Eclipse Kura”, IoT Day, Grenoble, 2014.
3.5.2 Exhibitions and Demonstrations
Participation to the Embedded World 2014 for the promotion of Eclipse Kura (in
collaboration with Intel and Oracle).
Participation to the JavaOne Exhibition for the promotion of the Kura platform (San
Francisco, 2013).
3.5.3 Other dissemination activities
Eurotech Kura aims at offering a Java/OSGi-based container for M2M applications running in
service gateways. This platform is one of the two counterparts of the cloud solution adopted
in the automotive scenario (UC2). With the collaboration of Hitachi and IBM, Eurotech
decided to submit Kura project to the Eclipse Foundation, in the context of the Eclipse
Technology Projects as an open source incubator. Currently, Eclipse Kura Project is in the
Project Proposal Phase as defined in the Eclipse Development Process. This dissemination
activity represents a key factor for the acceptance and diffusion of the Kura pervasive
platform in the M2M context and is extremely important because allows to increase, as much
as possible, the number of devices supported by the platform itself. A rich set of supported
devices has a direct impact on the potentialities of the cloud platform and on the added value
provided by the cloud services. The choice of an Eclipse based project, supported by the
Eclipse Member Program, is motivated by the large community of developers that support it
and by Eclipse IDE, a widely accepted and valuable open source integrated developed
environment.
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3.6 INTECS
3.6.1 Presentations at Conferences / Workshops
No presentation has been done at conferences so far.
3.6.2 Exhibitions and Demonstrations
The overview of the CONTREX project were presented at the Intecs booth in the ERTS 2014
Conference Exhibition in Toulouse.
3.6.3 Internal Events
Internal dissemination is dominant at this point in the project, as new technologies are
primarily being absorbed from CONTREX technology providers. The contents of the
CONTREX project were presented internally to other Intecs teams involved in other R&D
projects in the same technical area, such as the CONCERTO (Guaranteed Component
Assembly with Round Trip Analysis for Energy Efficient High-integrity Multi-core Systems)
ARTEMIS project and the SMASH (Secure MultifunctionAl Satellite on cHip) project for the
Italian Defence Administration.
Important cross-site internal dissemination is also occurring: the main technical work on the
use case is taking place within the L’Aquila site of Intecs, whereas another cross-functional
(modeling) team is located within the Pisa site of Intecs, geographically distant by several
hundred kilometers. Regular meetings are taking place in order to disseminate across the sites
the main technologies that are entering such as the Design Space Exploration techniques, the
power management and optimization techniques, and the virtual platform implementation
technologies in the L’Aquila site; and conversely the SysML / MARTE related modeling
techniques, which are mainly within the Pisa site. This internal dissemination activity is
filling an important gap in the spread of technological know-how within the company, which
must invest considerable effort in avoiding knowledge “silos”.
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3.7 iXtronics GmbH
3.7.1 Internal Events
Within the first 9 month of the project, iXtronics presented the intermediary results within 4
internal workshops.
These workshops took place with different customers (OEM and Tier 1) from the aerospace
and automotive industry.
iXtronics gave an outlook on potential later CAMeL-View toolboxes based on developments
of the CONTREX project (e. g. multi core target support).
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3.8 EDALab
3.8.1 Publications
E. Ebeid, F. Fummi, D. Quaglia, H. Posadas (UC), E. Villar (UC): "A Framework for Design-
Space Exploration and Performance Analysis of Networked Embedded Systems",
Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods
and Tools, ACM, 2014.
E. Ebeid, F. Fummi, D. Quaglia, Communication Alternatives Exploration in Model-Driven
Design of Networked Embedded Systems, IEEE International Workshop on Microprocessor
Test and Verification (MTV), Austin, TX, USA, 11–13 December, 2013, pp. 100-105.
E. Ebeid, F. Fummi, D. Quaglia, F. Stefanni, Automatic Network Protocol Synthesis from
UML Sequence Diagrams, IEEE International Workshop on Microprocessor Test and
Verification (MTV), Austin, TX, December 11-13, 2013, pp. 1-6.
3.8.2 Presentations at Conferences / Workshops
No Presentation at external events (seminars, workshops) has been done so far.
3.8.3 Exhibitions and Demonstrations
No exhibition and demonstration has been done so far.
3.8.4 Internal Events
No internal event (seminar, workshop, presentations) where CONTREX project and its results
were presented as been held so far.
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3.9 DOCEA POWER
3.9.1 Presentations at Conferences / Workshops
ARM TechCon 2014 - October 1-3 2014 in Santa Clara, US
DOCEA is taking part in this conference to present the following paper:
Electronic System Level Coupled Power-Thermal Modeling and Dynamic Analysis
By Gene MATTER, Nicolas PELTIER, Sylvian KAISER, Ilija MATERIC and Jean-
Christophe OUDIN – DOCEA Power
DAC Workshop on System to Silicon Performance Modeling - June 5 2014 in San
Francisco, US
DOCEA is taking part in this workshop to present a talk entitled:
Power and Thermal Modeling and Analysis at the System Level
By Gene MATTER, Sylvian KAISER – DOCEA Power
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3.10 POLITECNICO DI MILANO
3.10.1 Publications
Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano. “DeSpErate:
Speeding-up Design Space Exploration by using Predictive Simulation Scheduling”. In
Proceedings of DATE 2014 - International Conference on Design, Automation and Test in
Europe. Dresden, Germany. March 2014.
Edoardo Paone, Davide Gadioli, Gianluca Palermo, Vittorio Zaccaria e Cristina Silvano.
“Evaluating Orthogonality between Application Auto-Tuning and Run-Time Resource
Management for Adaptive OpenCL Applications”. In Proceedings of ASAP - International
Conference on Application-specific Systems, Architectures and Processors. Zurich,
Switzerland. June 2014.
Mariagiovanna Sami, Gianluca Palermo. “Virtual Semi-Concurrent Self-Checking for
Heterogeneous MPSoC Architectures: A DSE Approach” In Proceedings of ASAP -
International Conference on Application-specific Systems, Architectures and Processors.
Zurich, Switzerland. June 2014.
Carlo Brandolese, Luigi Rucco, William Fornaciari. Optimal wakeups clustering for highly-
efficient operation of WSNs periodic applications. IEEE international conference on
information communication and embedded systems (ICICES). Chennai, Tamilnadu, India,
February 2014.
Carlo Brandolese, Luigi Rucco, William Fornaciari. An optimal model to partition the
evolution of periodic tasks in wireless sensor networks. IEEE international symposium on a
world of wireless mobile and multimedia networks. Sydney, Australia, June 2014.
3.10.2 Presentations at Conferences / Workshops
The paper “DeSpErate: Speeding-up Design Space Exploration by using Predictive
Simulation Scheduling” has been presented by Gianluca Palermo at DATE 2014 Dresden,
Germany. March 2014. The event is very large, however the audience of the session was
around 40 people.
Gianluca Palermo presented a poster at HIPEAC 2014 (Jan 2014, Vienna, Austria) on
“DRuiD: Designing Reconfigurable Architectures with Decision-making Support” describing
the usage of Machine Learning techniques in HW/SW application mapping for FPGA based
designs. Globally the event included more than 400 people. Among them with around 10-15
researchers and PhD students a detailed technical discussion have been done on the content of
the poster.
On the same events Gianluca Palermo as co-organizer of the RAPIDO workshop, moderated
an invited talk session on functional and extra-functional modelling of multicore platform
where a presentation of CONTREX given by Philipp Hartmann from OFFIS has been
included. The audience of the RAPIDO workshop during the invited session was around 40
people from both industry and academia.
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Carlo Brandolese presented the paper “Optimal wakeups clustering for highly-efficient
operation of WSNs periodic applications” at ICICES2014. The number of attendees of the
event was around 200 peoples, 30 people were in the specific session where the paper has
been presented.
3.10.3 Exhibitions and Demonstrations
No presentations or demo has been done at exhibitions so far.
3.10.4 Internal Events
Internal Seminars to the POLIMI research group not involved in the project including also
MSc, Graduate and PhD students:
- Davide Gadioli. “ARGO: A C++ framework for monitoring application level extra-
functional properties and supporting application auto-tuning”. April 2014.
- Edoardo Paone: “Improving DSE with Constraint Programming techniques for
efficient DoE definition (Report of the period at KTH)”. January 2014.
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3.11 POLITECNICO DI TORINO
3.11.1 Publications
1. Sara Vinco, Alessandro Sassone, Franco Fummi, Enrico Macii, Massimo Poncino,
‘’An Open-Source Framework for Formal Specification and Simulation of Electrical
Energy Systems’’, accepted at ISLPED’14: International Symposium on Low Power
Electronics and Design, San Diego, CA August 2014.
2. Sara Vinco, Alessandro Sassone, Enrico Macii, Massimo Poncino,
“An Efficient Simulation Methodology for Electrical Energy Systems,’’ accepted at
PRIME’14: 10th Conference on Ph.D Research in Microelectronics and Electronics,
Grenoble, France, June 2014.
3.11.2 Presentations at Conferences / Workshops
No presentation has been done at conferences so far. The first two papers above will be
presented by POLITO people at the two events.
3.11.3 Exhibitions and Demonstrations
No presentation has been done at exhibitions so far.
3.11.4 Internal Events
The Open-Source Framework described in the first publication is currently used in course in
the Master program in Computer Engineering taught by Prof. Poncino at POLITO. This
course that targets embedded systems, the students use a model-based approach to design
complete systems including power source, energy storage devices and various digital and non-
digital electronic components, and where the target property to be simulated is power.
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3.12 UNIVERSIDAD DE CANTABRIA
3.12.1 Publications
E. Ebeid (U.Ver.), F. Fummi (U.Ver.), D. Quaglia (U.Ver.), H. Posadas, E. Villar: "A
Framework for Design-Space Exploration and Performance Analysis of Networked
Embedded Systems", proc. of the 6th Workshop on Rapid Simulation and Performance
Evaluation: Methods and Tools, ACM, 2014.
3.12.2 Presentations at Conferences / Workshops
No presentation has been done at conferences so far.
3.12.3 Exhibitions and Demonstrations
No exhibition and demonstration has been done so far.
3.12.4 Internal Events
No internal event (seminar, workshop, presentations) where CONTREX project and its results
were presented as been held so far.
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3.13 KUNGLIGA TEKNISKA HOEGSKOLAN
3.13.1 Presentations at Conferences / Workshops
The following paper has been presented at DATE 2014. The research presented in this paper
is the first version of the analytical design space exploration framework, which will be further
developed as part of Task 2.3.
K. Rosvall and I. Sander. A constrained-based design space exploration framework for
real-time applications on MPSoCs. In Design Automation and Test in Europe (DATE
'14), Dresden, Germany, Mar. 2014.
Audience: ca 50 conference participants of DATE 2014
3.13.2 Exhibitions and Demonstrations
No presentation has been done at exhibitions so far.
3.13.3 Internal Events
ICES Focus-Group Real-Time: KTH has a center ICES, Innovative Center for
Embedded Systems, which has ca 25 industrial partners. On March 5, 2014, Ingo
Sander, who is leading the focus group on real-time, gave a 20-minutes presentation
on CONTREX and the KTH activities in CONTREX for the members of the focus
group (Participants from seven industrial companies and from KTH). As a next step a
larger ICES-seminar is planned.
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3.14 ST-POLITO
No specific dissemination activities in this reporting period.
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4 Relations to Other Projects
The detailed analysis of relations to other projects is presented in the Deliverable D6.4.1.
The projects of relevance identified by CONTREX are OpenES, VERDI, ACOSE, H-
Inception, HiCool, ArrowHead, Benefic, EMC2 and CRYSTAL.
Common dissemination activities will be undertaken within the CONTREX Forum.
Some activities relative to the development of model for power source, converters and energy
storage devices as well as their fitting into a SystemC/IP-XACT based simulation framework
partially inherit from project FP7-ICT-288827 “SMAC” (Smart Systems Co-design),in which
the focus is however on functional properties. The extension to non-functional properties and
firstly to power/energy is the focus of POLITO’s contribution to CONTREX.
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5 Summary
Within the first 9 months of CONTREX operation several valuable activities were undertaken
by the project to initiate the dissemination and awareness of the project: organization of
technical workshops, exhibition booth, scientific papers and presentations at the conferences
are among the most important activities.
CONTREX also devised a plan how to expand and strengthen these activities in the future.