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Digital Control of dc-dc Boost Converters with Inductor ... mattavelli/publications.pdf/2004/Apec04... · PDF fileDigital Control of dc-dc Boost Converters with Inductor Current Estimation

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  • Digital Control of dc-dc Boost Converters with Inductor Current Estimation

    P. Mattavelli DIEGM, University of Udine

    Udine, Italy [email protected]

    Abstract This paper investigates a digital control of dc-dc boost converter operating in Continuous-Conduction Mode (CCM) sensing only the output voltage and possibly the input voltage. In order to improve the dynamic performance compared to voltage mode control, the inductor current is estimated and used for the implementation of an internal sensorless current loop. Different solutions, either based on the prediction of inductor current variations or on state observers, are discussed, showing that the sensorless current mode control gives some advantages only if input voltage feedforward is used. The digital control has been implemented in a Field Programmable Gate Array (FPGA) using a hardware description language (VHDL), providing flexibility and technology independence. Experimental results on a 100 W dc-dc boost converter confirm the properties and limitations of the proposed approach.

    Keywords: digital control, dc-dc converters, sensorless control

    I. INTRODUCTION Recent research activities [1,2] have shown the feasibility

    and advantages of using digital controller ICs specifically developed for high-frequency switching converters, highlighting a challenging future trend in Switched-Mode Power Supplies (SMPS) applications. In fact, up to a few years ago, the application of digital control for SMPS was unpractical due to the high cost and low performance of DSP and microcontroller systems even if the advantages that digital controllers offer, such as the immunity to analog component variations, the ability to implement sophisticated control schemes and system diagnostics, were well known. Moreover, digital controller ICs potentially offer other advantages from the integrated design point of view, such as faster design process, ease of integration with other digital systems, lower silicon area and power consumption than standard analog ICs.

    The investigation of digital control techniques for dc-dc converters is not new and several works are available up to now [1-12]. Main research activities have been focused on the analysis of typical digital implementation issues, such as sampling effects, dynamic characteristics of the closed-loop system using sample-data models, rounding and quantization effects, etc. . Deadbeat control for dc-dc converters has been also investigated in [10], where the current error is reduced to zero in a finite number of sampling periods. Moreover, digital control has been used for the implementation of sophisticated control techniques [11] and adaptive control [12].

    Multi-loop control for dc-dc converters using an internal current-mode control is usually considered superior to voltage mode control, due to overcurrent protection capability, better

    input voltage rejection and increased stability margin ensured by the fast inner current loop. This latter feature is particularly evident for dc-dc converters having a right-half-plane zero in the transfer function between duty-cycle and output voltage. However, the use of a digital current-mode controller requires the sensing of the switch or inductor current and thus an additional dedicated signal conditioning circuit and/or A/D converter. Sensorless current mode controllers, which use an internal current loop based on the estimated inductor current, have been proposed [13], but mainly in the analog domain. The direct translation in the digital domain is not straightforward since they usually require the instantaneous reconstruction of the inductor current waveform. Finally, an estimation of the load current in a digitally controlled dc-dc converter has been proposed in [14] for the identification of the boundary between DCM and CCM.

    This paper investigates the use of a simple estimation algorithm of the inductor current variations for dc-dc boost converters operating in CCM. The main goal is to achieve a dynamic performance comparable to that obtainable with conventional multi-loop control even without the measurement of the inductor current. Instead, since only inductor current variations are estimated, overcurrent protection capability is not available, as in any voltage-mode controller, so that an additional protection circuit is needed. Using an equivalency with voltage-mode controller, the proposed investigation shows that the effective advantages of the digital sensorless current control can be obtained only if the input voltage feedforward is used. The proposed control law can be applied in any second-order system (buck, boost and buck-boost). A boost prototype has been realized using a FPGA for the digital control implementation. An analog controller with peak current mode control has been designed for the same converter and compared with the digital solution highlighting properties and limitations of the proposed approach.

    II. PROPOSED CONTROL METHOD

    A. System model Fig. 1 shows the basic scheme of a dc-dc boost converter

    with the proposed control, where the voltage loop determines a reference iLref for the internal current loop. Inductor current sensing is avoided and its variation iL is estimated using the measurement of the output voltage vO, the complement of the duty cycle (=1 - ), and possibly the input voltage vin. According to the state space averaging method [15-16] and

  • assuming CCM operation, the average system dynamic behavior is described by the following equations

    )t(i)t(i)t()t(v

    dtdC

    )t(v)t()t(v)t(idtdL

    oL'

    o

    o'

    inL

    =

    = (1)

    where input voltage vin and output current io are considered as external disturbances. Under small-signal assumptions, we can derive the following small-signal model [15-16]

    )t(i)t(i'DI)t()t(v

    dtdC

    )t(v'DV)t()t(v)t(idtdL

    oLL'

    o

    oo'

    inL

    +=

    = (2)

    where symbol means perturbation around a steady state working point (i.e. x(t)=X+x(t), being X the steady-state point and x(t) the small-signal perturbation).

    Assuming that the input voltage vin(t), the output current io(t) and the duty-cycle (t) are constant between sampling instants (zero-order-hold sampling of the system), the discrete time dynamic equations can be written as:

    )k(u)k(')k(x)1k(x d21 ++=+ (3)

    where [ ]ToL )k(v)k(i)k(x = , [ ]Toind )k(i)k(v)k(u = and matrixes , 1 , 2 are given by:

    ( ) ( )

    ( ) ( )

    =

    swoswoo

    swoo

    swo

    TcosTsinC'D

    TsinL'DTcos

    (4.a)

    ( ) ( )( )

    ( )( ) ( )

    +

    =

    swoo

    Lswo

    o

    swoL

    swoo

    o

    1Tsin

    CITcos1

    'DV

    Tcos1'D

    ITsin

    LV

    (4.b)

    ( ) ( )

    ( ) ( )

    =

    swoo

    swo

    swoswo

    o2

    TsinC

    1'D

    Tcos1'D

    Tcos1TsinL

    1

    (4.c)

    In (4), Tsw is the sampling period and CL'Do = is the angular resonance frequency of the second order system. Under the assumption that the sampling frequency swsw T1f = is much greater than the open-loop resonance frequency of the boost converter (i.e. 1Tswo

  • to the voltage error vO(k) in (6) can be moved within the voltage loop controller, possibly simplifying control calculations, as described in section II.D.

    In order to highlight the properties of the current control with the estimated inductor current, the transfer function between iLref and vo has been reported in Fig. 3 using (a) the inductor current measurement and (b) the estimation scheme of Fig. 2. The converter parameters are given in Table I and correspond to those used for the converter prototype. Fig. 3 shows that there are only small differences between the two approaches in the frequency range closed to the voltage loop bandwidth, since they have almost the same phase and small differences in magnitude. At the same time, however, Fig. 3 shows a significant decrease of the magnitude at lower frequencies, which may affect output voltage tracking in the low-frequency range. This problem can be justified from the fact that (6) is practically an integral action on the perturbed inductance voltage and any dc error between the output voltage and its reference or between the duty-cycle and its nominal value (usually only roughly known and dependent on input voltage) leads to an linearly increasing estimation of inductor current. Thus, a PI-type voltage loop control does not ensure a zero steady-state error if its output, i.e. the inductance current reference iLref, is linearly increasing. Although (6) is not a pure integrator (since ac

  • 103

    104

    105

    106

    -50

    -40

    -30

    -20

    -10

    0

    10M

    agn

    itud

    e (

    dB)

    Bode Diagram

    Frequency (rad/sec)

    (a)

    (c)

    (b)

    Fig. 4 Converter audiosusceptibility with (a) inductor current measurement, (b) inductor current estimation using (7) and (c) inductor current estimation with input voltage feedforward (voltage loop bandwidth = 12 kHz).

    D. Equivalency with voltage mode controller Some of the properties and limitations of the scheme

    reported in Fig. 2 can be analysed rearranging the control block diagram in an equivalent voltage mode control. Indeed, any linear control scheme, which is based on the measurement of only the output voltage, can be rearranged in a voltage mode configuration with an equivalent transfer function between the output voltage error and the duty-cycle. Using simple block manipulations, the scheme of Fig. 2 can be replaced with the equivalent block diagram reported in Fig. 5. Inspection of Fig. 5 shows that the transfer function between the complement of duty cycle and the modified reference iLrefm and

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