MAPPER MAPPER Final Review, Brussels, 9th Apr. 2008 Model-based Adaptive Product and Process Engineering Work Package 2 Evatronix & advICo Use Case: Collaborative

MAPPERMAPPER

MAPPER Final Review, Brussels, 9th Apr. 2008

Model-based AdaptiveProduct and Process Engineering

Work Package 2

Evatronix & advICo Use Case:

Collaborative IP-based SoC design Pilot 3 demonstration and D15

MAPPER Final Review Brussels, 9.04.2008

USB PHY design challenges in MAPPER

– Needed experts from two different designers’ words: analog and digital

– The design environment is distributed (2 companies, 3 locations)

– Problems with interoperability of current design tools (different domains, different file formats)


Evatronix and Advico workflows

Component specification

Development

Verification

Product preparation

Each company has well defined own design flow

advICo Design Flow


Distributed design and verification between Advico and Evatronix

advICo

Design

Flow

Evatronix

Design

Flow

Analog and Digital Block integration

But common USB PHY design flow was a challenge


Distributed design and verification between Advico and Evatronix

But common USB PHY design flow was a challenge


Pilot 3 USB-OTG-PHY design coverage

Analog block Digital block

High SpeedAnalogFront End

HS Receiver

HS Transmitter

Full SpeedAnalogFront End

FS Receiver

FS Transmitter

High SpeedControl Logic

HS Receive logic

HS Transmit logic

Full SpeedControl Logic

FS Receive logic

FS Transmit logic

UTMI+USB lines

USB PHY design

Integration &Verification of whole USB PHY design was a scope of the Pilot 3


Pilot 3 Distributed design and verification between

Advico and Evatronix

Demo


Pilot 3 infrastructure


Pilot 3 – step1


Pilot 3 – step 1


Pilot 3 – step 2


Pilot 3 – step 2


Pilot 3 – step 2

Digital waveform view


Pilot 3 – step 2

Analog waveform view


Pilot 3 – step 3


Pilot 3 – step 3


Pilot 3 – step 4


Pilot 3 – step 4


CURE interface


CVW interface


Deliverable D15• Visual knowledge modeling in the field of

Electronic Design Automation• Towards distributed collaborative design of

electronic systems – USB PHY IP component development– Collaborative refinement of design specification

through virtual meeting – Pilot 1– Distributed design and verification at Evatronix –

Pilot 2– Distributed design and verification between

Evatronix and advICo – Pilot 3

• Design task patterns• Contributions from ethnography


Active knowledge models in WP2

• Evatronix (digital) and advICo (analog) design process

• enterprise architecture (POP*)

• joint A/D design flow (USB PHY)

• pilot definitions

• design task patterns

• CVW interface


MAPPER collaborative infrastructure deployed in WP2

• Tool integration with TRMS v. 2

• CURE workspace

• Metis modeling

• GUIs: CURE, CVW


TRMS 1TRMS 1E-Colleg resultE-Colleg resultapplicationapplicationANTS transport mechanismANTS transport mechanismpartial firewall crossingpartial firewall crossing

TRMS 1.1TRMS 1.1initial version for MAPPERinitial version for MAPPERapplicationapplicationown transport mechanismown transport mechanismno firewall crossingno firewall crossing

TRMS 1.2TRMS 1.2developed in MAPPERdeveloped in MAPPERappletappletown transport mechanismown transport mechanismservice-based functionalityservice-based functionality

TRMS 2TRMS 2new architecturenew architectureapplicationapplicationhttp/https transport mechanismhttp/https transport mechanismssfirewall crossingfirewall crossing

20032003

20052005

20062006

20072007

TRMS development path


TRMS achievements in MAPPER

• new architecture developed (old terminology kept)

• transfer based on standard https or http protocols

• all functionality based on Web services (supporting MAPPER integration)

• both applet and application versions available• deployed in pilots 2 and 3


Distributed design and verification of USB PHY design at advICo and Evatronix

Conclusions• METIS – models of each company design process allow

to develop the best common design process for this special (from each company perspective) USB PHY design

• CURE – As this interface didn’t require any additional effort from end users to setup it, and it can be used almost everywhere where internet access is – this is ideal environment which can integrate various design tools.

• TRMS – possibility of invoking it just from web browser, implemented security, remote invocation different design tools. All these features support automatisation of our design process. TRMS helps us use our tools more efficiently and accelerates our design work

Documents

MAPPER MAPPER Final Review, Brussels, 9th Apr. 2008 Model-based Adaptive Product and Process Engineering Work Package 2 Evatronix & advICo Use Case: Collaborative