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Holistic lithography and metrology'simportance in driving patterningfidelity

van den Brink, Martin

Martin van den Brink, "Holistic lithography and metrology's importance indriving patterning fidelity," Proc. SPIE 9778, Metrology, Inspection, andProcess Control for Microlithography XXX, 977802 (18 April 2016); doi:10.1117/12.2225538

Event: SPIE Advanced Lithography, 2016, San Jose, California, United States

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SPIE Advanced Lithography Symposium, Metrology, Inspection and Process Control XXX,San Jose, 22 February 2016

Holistic lithography and metrology’s importance in driving patterning fidelity

Martin van den Brink, President and Chief Technology Officer

Public

Content

• 43 years overlay metrology in microlithography: How did we get here?

• Stepper metrology improvements• Improved correction potential• Extend feedback loop outside stepper

• Holistic Lithography: where we are today

• The future of Holistic lithography: where we are going

• Summary

February 2016

PublicSlide 2

Keynote Presentation

Metrology, Inspection, and Process Control for Microlithography XXX, edited by Martha I. Sanchez, Vladimir A. UkrainstevProc. of SPIE Vol. 9778, 977802 · © 2016 SPIE · CCC code: 0277-786X/16/$18 · doi: 10.1117/12.2225538

Proc. of SPIE Vol. 9778 977802-1Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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February 2016Slide 3Public

43 years overlay: 3 orders of magnitude down¹

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

February 2016Slide 4Public

43 years overlay: 3 orders of magnitude down¹1973: Introducing the first 1:1 wafer stepper, ~0,5 μm overlay

Daniel P. Burbank, “The near impossibility of making a micro chip” in Invention & Technology, fall 1999, A.Offner, New Concepts in Projection Mask Aligners, Opt. Eng. 14(2), 142130 (Apr 01, 1975). .

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-2Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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February 2016Slide 5Public

43 years overlay: 3 orders of magnitude down¹

Transition to reduction steppers

Transition to reduction steppers

Holistic approachHigh order correctionsIntegrated metrologyComputational lithoDesign for control

Holistic approachHigh order correctionsIntegrated metrologyComputational lithoDesign for control

Manual Stepper setup

Manual Stepper setup

Automatic Stepper matching setup

Automatic Stepper matching setup

Transition from Stepperto scanners, increased correction capability

Transition from Stepperto scanners, increased correction capability

External Feedback and control

External Feedback and control

Dual stage scanners allowing increased

metrology

Dual stage scanners allowing increased

metrologyIntegrated Feedback and

process controlIntegrated Feedback and

process control

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

February 2016Slide 6Public

43 years overlay: 3 orders of magnitude down¹

Past overlay improvements:Stepper metrology improvements

Improved correction potentialExtend feedback loop outside stepper

Past overlay improvements:Stepper metrology improvements

Improved correction potentialExtend feedback loop outside stepper

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-3Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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S. Wittekoek, “Step and repeat imaging”, Proc. SPIE vol. 334, Optical microlithography I, march, 1982, Gijs Bouwhuis, Stefan Wittekoek, “Automatic Alignment system for optical projection printing”, IEEE transactions on electron devices, vol. ED-26, no. 4, April 1979, p 723-728,

43 years overlay: 3 orders of magnitude down, Steppers¹ 1979: 4-parameter reticle to wafer diffraction-based alignment

February 2016Slide 7Public

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

M.A. Van den Brink, H.F.D.Linders, S.Wittekoek, “Direct referencing automatic two-points reticle to wafer alignment using an projection column servo system”, Proc. SPIE vol. 633, Optical microlithography V, march, 1986.

43 years overlay: 3 orders of magnitude down, Steppers¹ 1986: 8-parameter alignment

February 2016Slide 8Public

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-4Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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Lens complexity 2.6x reduced

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Step and repeat Step and scan

Buckley, C Karatzas, “Step and scan, a system overvieuw of a new lithography tool,”, Proc. SPIE vol 1088, Optical laser lithography II, march 1989, M.van den Brink, H,Jasper, S.Slonaker, P.van Wijnhoven, Frans Klaassen, “Step and Scan and Step and Repeat, a technology comparison” Proc. SPIE vol. 2726, Symposium on Micro lithography IX, march 1996

43 years overlay: 3 orders of magnitude down, Steppers¹ 1987-97: Increased correctables on step and scan

The small Step and Scan slit enabled imaging and overlay adjustments on millimeter level by adjusting dose, aberration and slit position during scanning

February 2016Slide 9Public

Micralign

Frank Bornebroek; Jaap Burghoorn; James S. Greeneich; Henry J. L. Megens; Danu Satriasaputra; Geert Simons; Sunny Stalnaker; Bert Koek, “Overlay performance in advanced process,” Proc.SPIE vol.4000, Optical Microlitography XIII, Feb 2000

43 years overlay: 3 orders of magnitude down, Steppers¹2000: Multi-color alignment increased process robustness

February 2016Slide 10

Public

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-5Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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Dry: B.Sluijk, et all, “Performance results of a new generation of 300 mm lithography systems”, Proc. SPIE vol, 4346, Optical Microlithography XIV, February 2001

Wet: J Mulkens at all, “ArF immersion lithography using Twinscan technology”, Proc. SPIE vol. 5645, Advanced Microlithography Technologies, February 2005

43 years overlay: 3 orders of magnitude down, Steppers¹2001: Increased metrology time at higher productivity using dual stage

Time Line for Wafer Cycle with single immersion stage Load Dry Metrology Expose Unload

Metrology PositionExpose Position

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February 2016Slide 11

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43 years overlay: 3 orders of magnitude down, Steppers¹2007: Small process-compatible alignment markers by self-referencing

February 2016Slide 12

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M. Miyasaki, H.Saito, T.Tamura, T.Uchiyama, P.Hinnen, H.W.Lee, M.van Kemenade, M.Shahrjerdy, R.van Leeuwen, “The application of SMASH alignment system for 65-55 nm logic devices. Proc. SPIE vol. 6518, Metrology, inspection and process control for microlithography XXI February 2007, A den Boef, “Optical wafer metrology sensors for process-robust CD and overlay control in semiconductor device manufacturing” ,Surf. Topogr.: Metrol. Prop. 4 (2016) 023001

¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-6Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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February 2016Slide 13

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Stepper parameters per lotStepper parameters per lot

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¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

William. C. Schneider, “Testing The Mann Type 4800DSWTM Wafer Stepper” , Proc. SPIE vol. 0174, Developments in Semiconductor Microlithography IV, April, 1979

43 years overlay: 3 orders of magnitude down, corrections 1979: Manual stepper setup using verniers on reduction steppers

February 2016Slide 14

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ri 100 :t_I2.1. Intrafleld metrology modelThe intrafield metrology equations model thesystematic errors sources within the die, i.e. within oneImage field. We have extended the earlier intrafieldmodel published by McMillent s i to include additionallens distortion terms:

dX = dXr + XrMr: - Yr *r. -Xt'T.. - Xr;Ty* +Yr 2W, + Xrrr2D3, + Xrrr'D,, + Rr,

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dXf - dX + X_M.,, . Y O, + Y s Ds, + RexdYr - dY + YMy + X Oey + X 'Osy + RxyOr, - Or + YM f 2XDry + R,,, (13)

D,MacMillen, W.D.Ryden, “Analysis of Image field placement deviations of a 5x microlithography reduction lens” Proc. SPIE vol. 334, Optical Microlithography 1, march 1982.

43 years overlay: 3 orders of magnitude down, corrections¹ 1982: 8-parameter stepper overlay setup model

February 2016Slide 15

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¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

M. A. van den Brink ; C. G. de Mol ; R. A. George, “Matching Performance For Multiple Wafer Steppers Using An Advanced Metrology Procedure”, Proc. SPIE vol. 0921, Integrated Circuit Metrology, Inspection, and Process Control II, march, 1988

February 2016Slide 16

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43 years overlay: 3 orders of magnitude down, corrections 1988: 25-parameter automatic alignment setup

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Proc. of SPIE Vol. 9778 977802-8Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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February 2016Slide 17

Public

43 years overlay: 3 orders of magnitude down, corrections¹2007: 20-parameter higher-order user-definable corrections per field

February 2016Slide 18

Public

Michiel Kupers; Dongsub Choi; Boris Habets; Geert Simons; Erik Wallerbos, “Non-linear methods for overlay control”, Proc. SPIE vol. 6518, Metrology, Inspection, and Process Control for Microlithography XXI, Feb, 2007 #U

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Proc. of SPIE Vol. 9778 977802-9Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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Advanced Process Control (APC) can be defined as the use of process derived models. equipment models, sophisticatedt5

algorithms and signal processing techniques to:

Optimize exposure tool behaviorfrom empirical data.

Identify process critical controlelements.

Optimize process response usingmodeled elements.

Anticipate and correct for futureprocess drift before lot exposure.

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AdaptiveFryLpar CoefficientFigure I: A Feed -Forward Lithography loop antic'pates andcalculates exposure tool setup parameters before exposure of thelot. Feedback after metrology is used for lot pass/fail gating andto provide adaptive corrections to the feed- forward algorithms.

Mark Drew, Kevin G. Kemp, “Automatic feedback control to optimize stepper overlay” Proc. SPIE vol. 1926, Integrated Cirquit metrology, Inspection and process control VII, march, 1993

43 years overlay: 3 orders of magnitude down, feedback¹ 1993: Stepper external feedback control

February 2016Slide 19

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43 years overlay: 3 orders of magnitude down, feedback2000: Stepper advanced process control

February 2016Slide 20

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nsTerrance E. Zavecz, Rene Blanquies, ‘Predictive process control for sub-0.2-um lithography’, Proc. SPIE vol. 3998, Metrology, Inspection, and process control for microlithography XIV, Feb 2000

Proc. of SPIE Vol. 9778 977802-10Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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Martin van den Brink, “Holistic Lithography, wafer and computational lithography, layout and variability control”, SPIE 6924 Optical Microlithography XXI, march 2008

43 years overlay: 3 orders of magnitude down, feedback¹2008: Litho feedforward and feedback control

February 2016Slide 21

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¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Henk-Jan H. Smilde; Arie den Boef; Michael Kubis; Martin Jak; Mark van Schijndel; Andreas Fuchs; Mauritsvan der Schaar; Steffen Meyer; Stephen Morgan; Jon Wu; Vincent Tsai; Cathy Wang; Kaustuve Bhattacharyya; Kai-Hsiung Chen; Guo-Tsai Huang; Chih-Ming Ke; Jacky Huang, “Evaluation of a novel ultra small target technology supporting on-product overlay measurements” Proc . SPIE vol. 8324, Metrology, Inspection, and Process Control for Microlithography XXVI, feb 2012

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43 years overlay: 3 orders of magnitude down, feedback¹2012: Small target design allowing on-product targets

February 2016Slide 22

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¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

Proc. of SPIE Vol. 9778 977802-11Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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The future: extending Holistic approachHigh order corrections

Process-robust metrology, broad wavelength, polarization and multiple orders using marker reconstruction

Integrated metrologyComputational litho and metrology optimization

Dense on-product sampling enabling litho control; lot-lot, wafer-wafer, on-product

The future: extending Holistic approachHigh order corrections

Process-robust metrology, broad wavelength, polarization and multiple orders using marker reconstruction

Integrated metrologyComputational litho and metrology optimization

Dense on-product sampling enabling litho control; lot-lot, wafer-wafer, on-product

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¹Overlay data from projection lithography systems presented in SPIE publications 1973 - 2015

February 2016Slide 24

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Content

• 43 years overlay metrology in microlithography: How did we get here?

• Holistic Lithography: where we are today

• The future of Holistic lithography: where we are going

• Summary

Proc. of SPIE Vol. 9778 977802-12Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

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1. Advanced lithography

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2. Metrology 3. Computational lithography

Design context used to optimize metrology targets and pattering control scheme

February 2016Slide 25

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ASML holistic lithography: 6 competences

February 2016Slide 26

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1) Advanced Lithography: significantly improvedon critical parameters both for immersion as well EUV

EUV:

NXE:3300B > 1000 wafers per day up to > 80% uptime1 2 3 4 5 6 7 1 2 3 4 5 6 7

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Matched Machine Overlay [nm](full wafer, unfiltered, to reference)Full wafer Focus Uniformity [nm]

Proc. of SPIE Vol. 9778 977802-13Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

Detection NA

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February 2016Slide 27

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2) Metrology: boosts performance and productivityIncrease metrology accuracy, cut cost of metrology by a factor of 4

Illumination• Increased source power• Extension to higher wavelength• Variable spot size selection

Sensor• New sensor architecture optimized for

dedicated High NA DBO/F detection branch• Higher DBO/F magnification• Parallel 1st order wedge acquisition allowing for High

performance / high throughput mode

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22 February 2016Slide 28

Public

3) Computational Lithography: Robust modeling capabilityNegative Tone Development (NTD) resist with physical modeling accuracy improved 59%

Physical NTD resist model accounts for 3 dimensional shrink impacting 2D OPC accuracy

Empirical NTD resist model does not capture 3 dimensional shrink impact

Proc. of SPIE Vol. 9778 977802-14Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

_

--

rP\ 0 r,/ti

m+3s (nm)2.5 , 3.2

,1I

Radial overlay projection (nm)b L e, L. o- v u v u

Rad

ial o

verl

ay p

roje

ctio

n lo

otd

l d b

o- u

u s

u

22 February 2016

0

2

4

6

8

10

0 50 100 150

Expo

sure

Lat

itude

%

DoF (nm)

SMO Quasar 25

Slide 29Public

4) Process Window Enhancement: EUV optimizationover an increasingly large parameter space improves window 27%

Illumination Pupil CDU (nm)

Patternplacementerror (nm)

2x Line Edge Roughness

(nm)

TotalEPE(nm)

Simulated contour

PORQuasar

251.4 1.0 3.9 4.3

SMO 1.1 0.8 3.4 3.7

Total EPE = ((CDU)2+ (PPE)2 + (2xLER)2)1/2

27% improvement in total process window based on all 3 metrics: CDU,

pattern placement and LER.-21% -20% -13% -14%

EPE: Edge Placement Error determined by combination of CD, pattern placement and Line Edge Roughness

5) Metrology: >30% improved wafer edge overlay on Memory process stack using integrated and diffraction-based overlay metrology, fingerprint capturing and sampling optimization

Full waferX / Y Overlay (m+3 )

Wafer EdgeX / Y Overlay (m+3 )

Control mode

Stand Alone Image Based Overlay standard

sampling

Stand Alone/ Integrated Diffraction Based Overlay &

sampling optimization

Stand Alone Image Based Overlay

standard sampling

Stand Alone/ Integrated Diffraction Based Overlay & sampling optimization

Layer A 2.7 / 4.5 2.7 / 2.9 (IM) 3.2 / 3.6 3.2 / 3.5 (IM)Layer B 3.6 / 4.6 2.9 / 4.1 (SA) 3.7 / 5.1 2.5 / 3.2 (SA)

>30%

February 2016

PublicSlide 30

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O3 Kil

tdx0+0

101 Kl

1(.17.1 rkler1:

Kit

1

Tarnet tn devis

Metrology target design for control (D4C¹)

Diffraction Based Overlay

In = In (ov)-1 +10

• Target to device matching

• Metrology accuracy

Scanner grid matching

On-product overlay optimization and control

Across platform matching

• Overlay grid matching

• Baseline stability control

NXT:1970 NXE:3300

on-product corrections

• Correction model

• Sampling scheme

¹YS Kim, Y.S.hwang, M.R.Jung, J. H. Yoo, W.T.Kwon, K.Ryan, P.Tuffy, Y. Zhang, S.Park , N.L.Oh, C.Park . M.Shahrjerdy, R Werkam, K.T.Sun, J.M.Buyn,”Improving full-wafer on-product overlay using computationally designed process robust and device-like metrology targets” Proc SPIE proc. 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, Feb 2015

6) Process Window Detection: Engineering efficiency improvement by computational assisted alignment marker, recipe and sampling scheme optimization February 2016

Slide 31Public

February 2016Slide 32

Public

Content

• 43 years overlay metrology in microlithography: How did we get here?

• Holistic Lithography: where we are today

• The future of Holistic lithography: where we are going• Fingerprint estimation and Sampling optimization• Target design and recipe optimization• Pattern fidelity

• Summary

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i

r1.E +05

1.E +04

1.E +03

11 +02

1.E +01

1.E +00

1980 1990 2000 2010 2020

Challenges by balancing sampling and correction densityImproved noise suppression by determining fingerprint capture

• Number of litho-compatible parameters is close to or exceeds number of measurements

Issue with noise suppressionPractical # Metrology points per lot with high productivity metrology tools

• Not enough parameters for high-resolution litho-compatible fingerprint

Issue with fingerprint capture

#Use

r sel

ecta

ble

litho

corr

ectio

ns#m

easu

rem

ents

per

lot

Practical # Metrology points per lot with traditional metrology tools

• Typical number of parameters sufficient to capture fingerprint

Optimal noise reduction/fingerprint capture balance

February 2016

PublicSlide 33

Fingerprint capturing will improve correction noise

Good model at this location:Fit is within precision of reference

Overlay per wafer

Average overlay on this location

Measured

Modeled fit results

Reference

Non-captured fingerprint = 0 if model fit is within precisionOne measurement location

(typically ~ 1000-3000 points / 25 wafers)

Statistical precision

Not-so-good model: outside precisionDifference to edge of statistical precision:non-captured fingerprint

February 2016

PublicSlide 34

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5.0 -

4.5 -4.0 -3.5 -

M 3.0 -+E 2.5

m 2.0

1.5

1.0

0.5

0.0

POR model /samplingLitho Insight model /sampling

4.3

3.5

2.4

X

2:2

Center Fields

Y X

3.4

4.2

Edge Fields

-32

Y

Fingerprint modeling can decrease # parameters >10xresulting in better capturing the errors and reducing noise

Third order wafer model (55 parameters)

Fingerprint model(85 parameters)

6 parameter correction per expose (~1200 parameters)

M+3s=3.0 ; 2.7 nm M+3s=2.2 ; 2.2 nmM+3s=2.3 ; 2.3 nm

Total Average Fingerprint

Errors not captured by the model

February 2016

PublicSlide 35

Process Of Record models and sampling

Higher-order models and optimized sampling

Overlay Yield

Reducing overlay by 25% and improving edge yieldUsing an optimized sampling scheme

M.S. Kim et.al.,”Reduction of wafer-edge overlay errors using advanced correction models, optimized for minimal metrology requirements”, SPIE Conference 9780-9 , February 2016

February 2016

PublicSlide 36

Proc. of SPIE Vol. 9778 977802-18Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

February 2016Slide 37

Public

Content

• 43 years overlay metrology in microlithography, how did we get here

• Holistic Lithography; where are we today

• The future of Holistic lithography, where are we going• Sampling optimization• Target design and recipe optimization• Pattern fidelity

• Summary

February 2016Slide 38

Public

Diffraction-based process-robust overlay metrologyFast and affordable overlay metrology allowing dense wafer sampling

I+1 I-1 I+1 I-1IillIill

OV = 0: A = I+1 - I-1 = 0 OV 0: A = I+1 - I-1 =K OV

dOVKA dOVKAdOV dOV

grating 1 grating 2

AAAAdOV

Process-dependent K factor can be eliminated with 2 “biased” gratings:

Accurately determined by

mask writer

Accurately measured by

YieldStar

Detector Detector Detector

A den Boef, “Optical wafer metrology sensors for process-robust CD and overlay control in semiconductor device manufacturing” ,Surf. Topogr.: Metrol. Prop. 4 (2016) 023001

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2-

1.8 -

1.6 -

1.4 -

1.2 -

1-

0.8 -

0.6 -

0.4 -

0.2 -

o

MI Measured Accuracy

--TMU

+Simulated Accuracy

18

16

14

- 12

10

-8

6

4

2

2 4 5 6 7 8

Metrology target and recipe design requires optimizationto meet tight overlay requirements, computational approach needed to reduce the experimental verification/engineering time

Stack verification

Lithomode-

lling

Sensor modelling

Target optimization

Ranked target/recipecombination

Tota

l Mea

sure

men

t Unc

erta

inty

[nm

]

2

1.8

1.6

1,4

1,2

1

0.8

0.6

0.4

0.2

0 1 2 3 4 5 6 7 8 Target and tool recipe combination

18

16

14

12

10

8

6

4

2

0

Measured accuracy (SEM)

Total Measured Uncertainty

Simulated accuracy (μDBO)

Ove

rlay

Acc

urac

y [n

m]

¹YS Kim, Y.S.hwang, M.R.Jung, J. H. Yoo, W.T.Kwon, K.Ryan, P.Tuffy, Y. Zhang, S.Park , N.L.Oh, C.Park . M.Shahrjerdy, R Werkam, K.T.Sun, J.M.Buyn,”Improving full-wafer on-product overlay using computationally designed process robust and device-like metrology targets” Proc SPIE proc. 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, Feb 2015

February 2016

PublicSlide 39

February 2016Slide 40

Public

Using multi-wavelength to improve process robustness on Yieldstar, reducing the influence of process asymmetry on overlay

• Perform multi wavelength measurements

• Plot results in the “asymmetry plane”(A+ vs. A )

• Fit a (straight) line

Reference overlay ~ line slope

A+d

A d

Overlay = 0Overlay > 0

A+d

A d

Overlay = ?

Asymmetric grating

YS Self referenceOverlay

A+dA-d

Symmetric grating

Slope is proportional to overlay

1

2

3

4

5

Distance to origin ismeasure for gratingasymmetry

Overlay = 0

Leon Verstappen et.al., “Holistic Overlay Control for Multi-patterning Process layers at the 10-nm and 7-nm nodes”, SPIE conference 9778-141, Feb 2016

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-04CU0B0-POR-SEM

R

7

6

5

4

-15 -10

slit position [mm]

10 15

February 2016Slide 41

Public

Holistic Metrology Qualification selects recipe with best overlay accuracy

Setting WL 550nm - Pol 0 WL 550nm - Pol 90 WL 500nm - Pol 0 WL 450nm - Pol 0 WL 450nm - Pol 90

Overlay map

6 nmm+3sx: 4.4 nmy: 11.7 nm

V56_20_C16_P500_WL550_0_D792_NF1

sqrt

(dx²

+dy²

) (nm

)

0

1

2

3

4

5

6

6 nmm+3sx: 9.2 nmy: 4.2 nm

V56_20_C16_P500_WL550_90_D1720_NF1

sqrt

(dx²

+dy²

) (nm

)

0

1

2

3

4

5

6

6 nmm+3sx: 4.3 nmy: 17.5 nm

V56_20_C16_P500_WL500_0_D351_NF1

sqrt

(dx²

+dy²

) (nm

)

0

1

2

3

4

5

6

6 nmm+3sx: 3.7 nmy: 8.6 nm

V56_20_C16_P500_WL450_0_D673_NF1

sqrt

(dx²

+dy²

) (n

m)

0

1

2

3

4

5

6

6 nmm+3sx: 6.5 nmy: 25.2 nm

V56_20_C16_P500_WL450_90_D2451_NF1

sqrt

(dx²

+dy²

) (nm

)

0

1

2

3

4

5

6

6 nmm+3sx: 5.2 nmy: 8.7 nm

YS Self-Reference (YS SR)

sqrt

(dx²

+dy²

) (n

m)

0

1

2

3

4

5

6

The overlay maps of individual YS recipes are compared to the self-reference overlay:

self reference overlayFor every point, the overlay is calculated based on multi-wavelength slope:

Leon Verstappen et.al., “Holistic Overlay Control for Multi-patterning Process layers at the 10-nm and 7-nm nodes”, SPIE conference 9778-141, February 2016

Target to Device overlay mismatch reduced to < 0.9 nmBy optimizing target layout compatibility with device layout

0

1

2

3

4

5

Del

ta O

verla

y (n

m)

Set of simulated overlay targets

Selected best target for verification

pupil lens masks overlay targetwafer stack

+ + + =

J.Zhou, “Eliminating the offset between overlay metrology and device pattern using computational target design” SPIE conference 9778-50, February 2016

Target with smallest overlay delta with productNot optimized targetProduct overlay (SEM)

February 2016Slide 42

Public

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Sim

ulat

ed a

lignm

ent e

rror

[nm

]

tlMm

ent

February 2016Slide 43

Public

Substantial alignment process robustness improvementUsing multiple wavelengths and polarizations in computational overlay simulation

30 different process stacks and marker combinations in both FEOL and BEOL

carbon

Si wafer

BARCresist

ILD

“poly”

ILD copper ILDILD

coppercopper ILD5x process excursion reduction

Current alignment sensor

+ 2 polarizations and improved algorithms

+ intensity information improved algorithms

Color weighting

2x process robustness reduction

February 2016Slide 44

Public

Content

• 43 years overlay metrology in microlithography: How did we get here?

• Holistic Lithography: where we are today

• The future of Holistic lithography: where we are going• Sampling optimization• Target design and recipe optimization• Pattern fidelity

• Summary

Proc. of SPIE Vol. 9778 977802-22Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

wY

At., -4...

~

-

r,

/'

February 2016Slide 45

Public

Pattern fidelity is impacted by multi-patterning and variabilityEdge placement error affected by overlay and CD variations

ArFi with LE3 after TiN etch

EUV exposed after TiN etch

Pattern fidelity affected by CD proximity and pull back Best pattern fidelity with EUV

Data courtesy IMEC 10-nm logic design (M1)

pattern shift and critical via landing induced by overlay error

CD variation after etch effectively controlled with scannerSelf-aligned double patterning fidelity optimized by balancing spacers S1 and S2

LithoLithoLitho

LithoLithoFinalEtch

Free form dosecontrol per field

YieldStar CD metrologyHigh resolution dose corrections

February 2016

PublicSlide 46

Proc. of SPIE Vol. 9778 977802-23Downloaded From: https://www.spiedigitallibrary.org/conference-proceedings-of-spie on 29 Mar 2021Terms of Use: https://www.spiedigitallibrary.org/terms-of-use

Patterning fidelitydetection vs distribution

7 nm node

á W 10 nm node

e 14116 nm nodeg missing yIdefects ' -.

\dtned0ptfiesGe

5 10 15 20 25

Patterning fidelity error size [nm]

February 2016Slide 47

Public

CD fidelity improved by 2x using higher-order corrections2 wafer data

3 =0.7nmMean=-2.96nm

Inte

rfie

ldFP

Intr

afie

ldFP

No spacer control

3 =0.50nmR2=0.70

3 =0.41nmR2=0.67

3 =0.20nm 3 =0.21nm

3 =0.66nmMean=-2.46nm

3 =0.41nmMean=-2.53nm

3 =0.44nmMean=-2.35nm

3 =0.22nm 3 =0.24nm3 =0.34nmR2=0.98

3 =0.35nmR2=0.98

Full

waf

er

Spacer control

S1-S2 0.70nm 0.44nm 47% improved

S1-S2 0.50nm 0.21nm 58% improved

S1-S2 0.35nm 0.24nm 31% improved

J. Lee et. al, “Spacer multi-patterning control strategy with optical CD metrology on device structures” SPIE conference 9778-80, February 2016

Bright field inspection misses patterning errors when size

Tachyon simulations

Hotspot detection Computational Patterning fidelity prediction

Source: Imec 10 nm SuperNova M1A

February 2016Slide 49

Public

Patterning fidelity litho control impact, the next holistic step Using computational prediction allowing per wafer patterning control

TwinScan control

Patterning fidelity after scanner control

Guided e-beam verificationVerified Patterning

fidelity Map

+

TwinScan & YieldStar metrology

=

Measured product wafer focus & CD

Focus map Process(CD) map

&

E-beam feedback loop

Lithography

Process awarecontrol

After litho hotspotsHot Spot candidates

prediction

+

Process and designaware control

February 2016Slide 50

Public

Extension of control loops to patterning and fidelity

E-beam validation

Etch

After etch hotspots

+

Patterning

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patteml

40Measured defects Measured defects 36(before correction) (after correction)

30

26

25 23 1

2058°- 92% 74%

15

10

5

H51 H62 H53

February 2016Slide 51

Public

Pattern fidelity improvement through scanner corrections

HS1 HS2 HS3 HS4

Bef

ore

Cor

rect

ions

Without Corrections

Afte

r C

orre

ctio

ns

With Corrections

Full Wafer Dose Correction Full Wafer Focus Correction

Feature

Patte

rn fi

delit

y er

ror

Cou

nt, #

Marinus Jochemsen, Roy Anunciado, Vadim Timoshkov, Stefan Hunsche, Xinjian Zhou, Chris Jones, Neal Callan, “Process window limiting hot spot monitoring for high volume manufacturing” SPIE conference 9778, February 2016

Measured before correction

Measured after correction

February 2016Slide 52

Public

Content

• 43 years overlay metrology in microlithography: How did we get here?

• Holistic Lithography: where we are today

• The future of Holistic lithography: where we are going

• Summary

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February 2016Slide 53

Public

Future trends in holistic lithography – overlay

• In general for overlay and pattern fidelity:• The stepper correction capability is on a millimeter scale and underutilized• Sampling from product vs targets could lead to an different overlay measurement

• What we observe for overlay:• Overlay contribution from wafer deformation and marker fidelity vs stepper

accuracy is increasing in the total overlay budget• Wafer deformation and marker fidelity variation from wafer to wafer starts

contributing in the overlay

• As a consequence for overlay• There needs to be a consistent trend down in cost per measurement for metrology

to allow higher sampling density• Sampling schemes need to be optimized capturing the relevant parameter

instability and allow averaging to reduce noise• Above will allow scanner correction capability moving from feedback per batch on

global targets to feedback per wafer on intra-die product structures

February 2016Slide 54

Public

Future trends in holistic lithography – pattern fidelity

• What we observe for pattern fidelity• Multiple patterning complexity increases the pattern variability per wafer

not to be captured by existing tools for acceptable cost• The variability widens from variability in CD to variability in 3D geometry

including edge placement and defects

• Pattern fidelity requirements could be met by• Optical CD metrology allows chip manufacturers to increase sample rate for

acceptable cost allowing scanner correction capability per die per wafer• Defects could be predicted by simulating hotspots and convolutes with wafer

focus, dose and aberration maps producing a per wafer defect probability map• Per wafer control loops can be designed for defect and edge placement by

driving the stepper settings

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