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RMR©2012 Maths is not everything Embedded Systems 4 - Hardware Architecture CPU Input/Output mechanisms Memory Buses and Aux I/O Input/Output interfaces Power Management

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RMR©2012

Maths is not everything

Embedded Systems4 - Hardware Architecture

CPUInput/Output mechanisms

Memory Buses and Aux I/O

Input/Output interfacesPower Management

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RMR©2012

Maths is not everything

CPUPower Management

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CPU power consumption

Most modern CPUs are designed with power consumption in mind to some degree.Power vs. energy:

heat depends on power consumption;

battery life depends on energy consumption.

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CMOS power consumption

Voltage drops: power consumption proportional to V2.Toggling: more activity means more power.Leakage: basic circuit characteristics; can be eliminated by disconnecting power.

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CPU power-saving strategies

Reduce power supply voltage.Run at lower clock frequency.Disable function units with control signals when not in use.Disconnect parts from power supply when not in use.

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Power management styles

Static power management: does not depend on CPU activity.

Example: user-activated power-down mode.

Dynamic power management: based on CPU activity.

Example: disabling off function units.

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Application: PowerPC 603 energy features

Provides doze, nap, sleep modes.Dynamic power management features:

Uses static logic.

Can shut down unused execution units.

Cache organized into subarrays to minimize amount of active circuitry.

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PowerPC 603 activity

Percentage of time units are idle for SPEC integer/floating-point:

unit Specint92 Specfp92

D cache 29% 28%

I cache 29% 17%

load/store 35% 17%

fixed-point 38% 76%

floating-point 99% 30%

system register 89% 97%

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Power-down costs

Going into a power-down mode costs:time;

energy.

Must determine if going into mode is worthwhile.Can model CPU power states with power state machine.

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Application: StrongARM SA-1100 power saving

Processor takes two supplies:VDD is main 3.3V supply.

VDDX is 1.5V.

Three power modes:Run: normal operation.

Idle: stops CPU clock, with logic still powered.

Sleep: shuts off most of chip activity; 3 steps, each about 30 µs; wakeup takes > 10 ms.

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SA-1100 power state machine

run

idle sleep

Prun = 400 mW

Pidle = 50 mW Psleep = 0.16 mW

10 μs

10 μs90 μs

160 ms90 μs

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MSP430Power Management

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Extended Ultra-low Power standby mode • Minimum active duty cycle• Performance on-demand

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Maths is not everything

MSP430: achieving ultra-low power

Extended Ultra-low Power standby modeMinimum active duty cyclePerformance on-demand

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MSP430: ultra-low power clock control

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MSP430: active mode supply current

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MSP430: basic clock configuration

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MSP430: basic clock mode + VLO clock

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MSP430: low power mode configuration

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MSP430: interrupts control program flow

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MSP430: software functions vs peripherals

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MSP430: C coding tips

Use local variable as much as possible.Local variables use CPU registers whereas global variables use RAM.

Use bit mask instead of bitfields for unsigned int and unsigned char.Use unsigned data types where possibleUse pointers to access structures and unionsUse “static const” class to avoid run-time copying of structures, unions, and arrays.Avoid modulo Count down “for” loops

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MSP430: principles of ULP operation

Maximize the time in standby (LPM3) Use interrupts to control program flowRep lace software funct ions w ith peripheral hardware Power manage internal peripherals Power manage external devices Device choice can make a difference Effective code is a must

Every unnecessary instruction executed is a portion of the battery wasted that will never return.

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