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Development of the DEPFET Sensor with Signal · PDF file1 AIS Seminar SLAC, 26.10.12 Development of the DEPFET Sensor with Signal Compression: a Large Format X-ray Imager with Mega-Frame

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  • 1

    AIS Seminar SLAC, 26.10.12

    Development of the DEPFET Sensor with Signal Compression: a Large Format X-ray Imager with Mega-Frame Readout Capability for the

    European XFEL

    SLAC, 26.10.2012

    Matteo Porro on behalf of the DSSC Consortium

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    AIS Seminar SLAC, 26.10.12

    M. Porro1,2, L. Andricek2,3, S. Aschauer8, L. Bombelli4,5, A. Castoldi4,5, G. De Vita1,2, I. Diehl7, F. Erdinger6, S. Facchinetti4,5, C. Fiorini4,5, P. Fischer6, T. Gerlach6, H. Graafsma7, C. Guazzoni4,5, K. Hansen7, H. Hirsemann7, P. Kalavakuru7, A. Kugel6, P. Lechner8, G. Lutz8, M. Manghisoni10, D. Mezza4,5, D. Moch1,2, U. Pietsch9, E. Quartieri10, V. Re10, C. Reckleben7, C. Sandow8, S. Schlee1,2, J. Soldat6, L. Strueder1,2, A. Wassatsch2,3, G. Weidenspointner1,2, C. Wunderer7

    1) Max Planck Institut fuer Extraterrestrische Physik, Garching, Germany 2) MPI Halbleiterlabor, Muenchen, Germany 3) Max Planck Institut fuer Physik, Muenchen, Germany 4) Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milano, Italy 5) Sezione di Milano, Italian National Institute of Nuclear Physics (INFN), Milano, Italy 6) Zentrales Institut fr Technische Informatik, Universitaet Heidelberg, Heidelberg, Germany 7) Deutsches Elektronen-Synchrotron DESY, Hamburg, Germany 8) PNSensor GmbH, Muenchen, Germany 9) Fachbereich Physik, Universitaet Siegen, Siegen, Germany

    10) Dipartimento di ingegneria industriale, Universit di Bergamo, Bergamo, Italy

    DSSC Consortium

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    AIS Seminar SLAC, 26.10.12

    Introduction

    DSSC Concept overview

    Requirements and Design Parameters Focal Plane overview Non-linear DEPFET working principle Non-linear system properties Readout ASIC

    Main Achievements

    System simulation

    Conclusions

    Outline

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    AIS Seminar SLAC, 26.10.12

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    AIS Seminar SLAC, 26.10.12

    Up to ~2700 bunches in 600 s, repeated 10 times per second producing 100 fs X-ray pulses (~27 000 pulses/second).

    max bunch rate: 4.5 MHz

    We want to readout 1024 x 1024 pixel

    frames every 220 ns

    Bunch structure of the European XFEL

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    AIS Seminar SLAC, 26.10.12

    2D detectors for EuXFEL

    Three Detector Developments at the European XFEL (coordinator: M. Kuster)

    Adaptive Gain Pixel integrating Pixel Detector Consortium (AGIPD) (Project Leader: H. Graafsma) o DESY o PSI / SLS Villingen o Universitt Hamburg o Universitt Bonn

    Large Pixel Detector Consortium (LPD) (Project Leader: M. French)

    o Rutherford Appleton Laboratory / STFC o University of Glasgow

    DEPFET Sensor with Signal Compression Consortium (DSSC) (Project Leader: M. Porro)

    o Max Planck Halbleiterlabor Munich o DESY o Universitt Heidelberg o Politecnico di Milano / INFN o Universit di Bergamo o Universitt Siegen

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    AIS Seminar SLAC, 26.10.12

    DSSC Design Parameters

    Parameter

    Energy range op+mized for 0.5 6 keV

    Number of pixels 1024 x 1024 Sensor Pixel Shape Hexagonal Sensor Pixel pitch ~ 204 x 236 m2

    Dynamic range / pixel / pulse

    ~5000 ph @ 0.5 keV > 10000 ph @ E1 keV

    Resolu+on Single photon detec+on also @ 0.5 keV

    Frame rate 0.9-4.5 MHz Stored frames per Macro bunch 640

    Opera+ng temperature

    -20C op+mum, RT possible

    1 Mpixel camera with:

    Single photon sensitivity event at 0.5 keV

    high-dynamic range (>10000 ph/pixel)

    Frame rate up to 4.5 MHz (1 image every 220 ns)

    All the properties have to be achieved simultaneously

    DSSC will be the first instrument to fulfill this requirement

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    AIS Seminar SLAC, 26.10.12

    DSSC Overview - Concept

    DEPFET Active Pixel Sensor

    Readout Concept Fast analog shaping Immediate 8 Bit digitization (9 bit for f 2.2 MHz) In-Pixel SRAM Readout during macro bunch gaps

    Power cycling

    Focal Plane

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    AIS Seminar SLAC, 26.10.12

    1024x 1024 pixels

    16 ladders/hybrid boards

    32 monolithic sensors 128x256 6.3x3 cm2

    DEPFET Sensor bump bonded to 8 Readout ASICs (64x64 pixels)

    2 DEPFET sensors wire bonded to a hybrid board connected to regulator modules

    Dead area: ~15%

    x-y Gap

    128 x 256 Pixel Sensor

    21 c

    m (1

    024

    pixe

    ls)

    DSSC Overview- Focal Plane Overview

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    AIS Seminar SLAC, 26.10.12

    DSSC overview ladder module

    ~3 mm

    1-2 mW/pixel peak power (SENSOR+FRONT-END) 1-2 kW peak power

    Power cycling about 1/100

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    AIS Seminar SLAC, 26.10.12

    DSSC DEPFET

    4.5 MHz frame rate

    Every DEPFET pixel provides detection and amplification with:

    Intrinsic low noise due to the small anode capacitance single photon

    sensitivity even at 0.5 keV

    Signal compression at the sensor level thanks to the special internal

    gate topology high dynamic range

    Charge collection time ~ 60 ns

    Cu layer for bump-bonding allowing

    full parallel readout

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    AIS Seminar SLAC, 26.10.12

    DSSC DEPFET Principle

    Standard DEPFET principle

    o p-FET on depleted n-bulk

    All signal charge collected in poten+al minimum below FET channel "internal gate"

    all signal charges cause an equal effect on the FET current

    linear I/Qsig characteristics

    o reset via ClearFET

    o low capacitance & noise

    DSSC adaptation

    signal charges at high levels also stored under source

    less/no effect on FET current

    non-linear I/Qsig characteristics

    gain curve engineering by dose & geometry of implantations

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    AIS Seminar SLAC, 26.10.12

    DSSC DEPFET Simulation and Layout

    236

    m

    272 m Pitchx: 204 m Pitchy: 236 m

    DEPFET

    Dri_ rings

    hexagonal shape

    - side length 136 m (A=48144 m2)

    - compatible with C4 bumping @ IBM

    technology

    - 2 polySi layers

    - 2 + 1 metal layers

    - 12 implantations

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    AIS Seminar SLAC, 26.10.12

    In the linear region the noise is dominated by electronics noise of the sensor and the readout electronics

    Single photon detection properties are given by the electronics noise of the system with empty internal gate

    For a high input signals more photons fall within one ADC bin. The quantization noise is dominant.

    The quantization noise is always below the poisson noise of the photon generation process

    Analog to digital conversion single photon detection and quantization noise

    Electronics noise ADC bin size

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    AIS Seminar SLAC, 26.10.12

    Dynamic range

    1 ph @1keV Dynamic range for 3keV

    ph 8 bits (~8300 ph.)

    256 x bin size @3 keV

    The achievable dynamic range depends on: The shape of the DEPFET non-linear characteristic The number of bits of the ADC The number of bins of the ADC associated to the signal produced by the first collected photon The photon energy.

    The dynamic range increases with the photon energy. This is because as the photon energy increases, the number of photon falling in the low-gain region of the DEPFET response also increases: it is possible to allocate more photons in the same number of bins

    Dynamic range for 1keV ph 8 bits (~2400 Ph.)

    256 x bin size @1 keV

    8 bit 28 bins = 256 bin

    Bin size

    Bin size

    1 bin / ph.

    1 ph @3keV

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    AIS Seminar SLAC, 26.10.12

    Dynamic range

    1 ph @1keV Bin size

    Dynamic range for 1keV ph 8 bits (~2400 Ph.)

    256 x bin size @1 keV

    The achievable dynamic range depends on: The shape of the DEPFET non-linear characteris+c The number of bits of the ADC The number of bins of the ADC associated to the signal produced by the first collected photon The photon energy.

    The dynamic range increases with the number of bits

    1 bin / ph.

    Dynamic range for 1keV ph 9 bits (~12080 ph.)

    512 x bin size @1 keV

    9 bit 29 bins = 512 bin

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    AIS Seminar SLAC, 26.10.12

    DSSC overview - ASIC

    Every ASIC pixel comprises in 206 x 236 m: A trapezoidal analog filter (optimum filter for white series noise) A single slope 8 bit ADC (9 bit for f2.2 MHz) An SRAM able to store 640 frames

    Gain and offset can be adjusted pixel-wise

    Single slope ADC ASIC final format : 64 x 64 pixels 130 nm CMOS Process C4 Bumps

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    AIS Seminar SLAC, 26.10.12

    MAIN ACHIEVEMENTS (on sensor and readout ASIC)

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    AIS Seminar SLAC, 26.10.12

    Sensor - Measured Non-linear 7-cell DEPFET Prototype

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    AIS Seminar SLAC, 26.10.12

    spectroscopy

    o Fe55 source

    linear region of the gain curve

    noise peak ~ 10 el. ENC

    Mn-K line ~ 150 eV FWHM @ 5.9 keV

    Response to a pulsed laser/electrical charge injection

    increasing number of identical pulses

    peaks are equidistant in terms of signal charge

    signal compression @ large charge amount

    "energy" calibration using Fe55 spectrum

    non-linear gain of DEPFET prototype

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    AIS Seminar SLAC, 26.10.12

    non-linear gain DEPFET (pxd-7)

    signal compression

    o seven cells of a cluster

    o standard variant (W/L = 25/3)

    o sensitivity in the linear region

    gq 600 pA/el.

    o compression factor

    ~ 17.5

    o current dispersion

    I/I 10 %

    non-l