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ILC VXD Review, Fermilab, October 23, 2007 Hans-Günther Moser, MPI für Physik DEPFET Devices Hans-Gunther Moser for the DEPFET Collaboration ()

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Text of ILC VXD Review, Fermilab, October 23, 2007 Hans-Günther Moser, MPI für Physik DEPFET Devices...

  • DEPFET Devices

    Hans-Gunther Moser

    for the DEPFET Collaboration(www.depfet.org)

    Hans-Gnther Moser, MPI fr Physik

  • OutlineDesign and Simulations

    Technology

    DEPFET Production

    Single Pixel Results

    Radiation Tolerance

    Ladder Concept & Thinning

    New Production

    Hans-Gnther Moser, MPI fr Physik

  • Design: Double PixelCompact layout: sharing of source, gate, and clear, less metal lines, more equally distributed in x and y=> smaller pixel size possible Simultaneous readout of two lines: => doubles readout speed (needs more readout channels, however)gateclearsourcedrain 1drain 2

    Hans-Gnther Moser, MPI fr Physik

  • Device SimulationCharge -> current conversion factor (gq) as function of gate length

    Confirmed by measurements

    For Leff = 4 mm (actual devices)gq = 500 pA/eWith reduced gate length:gq > 1nA/e possibleLarger gq improves S/N Less sensitive to external noise sources

    Hans-Gnther Moser, MPI fr Physik

  • Device SimulationWell defined potential minima under FET gates=> Good charge collection efficiency expectedPotential in a DEPFET array in accumulation mode

    Hans-Gnther Moser, MPI fr Physik

  • Device Simulation: Charge collection and clearCharge collectionClear mechanismClearGate

    Hans-Gnther Moser, MPI fr Physik

  • Simulation: Collection time and charge lossesCharge collection usually fast (~ ns for 45 mm)Except: interface at clear region (low lateral field)Long collection times (~ms)Losses due to trapping likelyRemedy: HE (deep) n-implant: -> charge kept away from interfaceIntroduction of lateral drift fields-> fast charge collection also under clearNo significant charge losses expectedt= 1mst= 2ns

    Hans-Gnther Moser, MPI fr Physik

  • DEPMOS Technology at the MPI Semiconductor Laboratory along the channelperpendicular to the channel (Clear region) Metal 2

    Metal 1

    Oxide Poly 2 Metal 2 Metal 1 Poly 2 Clear Gclear ChannelpDeep nn+Deep pPoly 1Double Poly / Double Al Technology on high ohmic 150mm substrateDouble metal necessary for matrix operationSelf-aligned implantations with respect to polysilicon electrodes => Reproducible potential distributions over large matrix areasLow leakage current level: < 200pA/cm (fully depleted 450m)

    Hans-Gnther Moser, MPI fr Physik

  • PXD4 Production: 1st Iteration of DEPFET MatricesProduction in the MPI semiconductor laboratory

    Various test structures & single pixelsTest-Matrices (amongst others):Arrayarea Pixel Size Clear64 x 128 7x7 mm2 33x24 mm2 common gate64 x 128 7x7 mm2 36x22 mm2 common gate64 x 1287x7 mm2 36x29 mm2 pulsed gate

    Clear mechanisms:Clear gate: potential barrier between gate and clear contact:Pulsed: can be lowered during clear: lower clear voltagesCommon: fixed potential, simpler layout (smaller pixels)HE implant: internal gate deeper in bulk: -> lower clear voltages (better clear performance)-> lower amplification

    Hans-Gnther Moser, MPI fr Physik

  • Single Pixel TestsTests of basic DEPFET parametersSingle double pixelS: source (common)D1, D2: drainG1, G2: gateC1, C2: clear contactsgain (gq)clear efficiencyintrinsic noiseradiation hardness

    Hans-Gnther Moser, MPI fr Physik

  • Single Pixel Test: gq (charge -> current conversion)Expected dependence of gq on gate length confirmed

    Future: reduce gate length to increase gain to ~ 1 nA/e

    (L: design parameter, Leff smaller due to underetching)

    Hans-Gnther Moser, MPI fr Physik

  • Single Pixel Tests: Clear EfficiencyComplete clear:-> necessary for low noise operation

    Incomplete clear -> some charge remainsFluctuations of left over charge -> reset noiseNoise as function of clear parameters -> Complete clear in large parameter space

    Fast clear: -> necessary for high speed operation

    Complete clear achievable in < 10 ns

    Present clear voltages rather high (>10V)Design goal: lower clear voltages (U > 10V not compatible with rad. hard CMOS)

    Hans-Gnther Moser, MPI fr Physik

  • Lab Tests: Noise versus bandwidth1.6 e ENC at t=10 ms25 e ENC at t=33ns (30MHz)Measurements of a single pixel with an external high bandwidth amplifier.

    High speed readout => high bandwidth => short shaping timesThermal noise of the DEPFET transistor ~ 1/SQRT(t)

    Hans-Gnther Moser, MPI fr Physik

  • Lab Tests: Noise versus bandwidthIntrinsic DEPFET noise sufficiently low for high speed operation at ILCFor 20 MHz line readout rate: 50 MHz bandwidth for single measurement (sample-clear-sample)@ 50 MHz: rms ~ 30 e-Aim for S/N ~ 40/1 (~ 100 e-): sufficient headroom for external noise sources!

    Hans-Gnther Moser, MPI fr Physik

  • Radiation HardnessIonising radiation (g, e from beamstrahlung).Creation of fixed positive charge in gate oxide.Shift of flatband voltage (more negative to compensate oxide charge).Shift of transistor threshold voltage

    Irradiation with Co60 g: ~ 1 MRadTransistor off: DU ~ 4VTransistor on: DU ~ 6VDEPFET operation: transistor off most of the time (1000/1).Threshold voltage can be compensated adjusting switcher voltages.

    Gate oxidekradDU(V)

    Hans-Gnther Moser, MPI fr Physik

  • Radiation HardnessD1D2SG1G2ClClnon-irradiatedVthresh-0.2V, Vgate=-2Vtime cont. shaping =10 sNoise ENC=1.6 e- (rms)at T>23 degC912 krad 60CoVthresh-4.0Vtime cont. shaping =10 sNoise ENC=3.5 e- (rms)at T>23 degCOxide damage: introduce traps at interface, reduce mobility-> increase of 1/f noise-> change of transistor gain: gm, gqNegligible noise increase observed (1/f noise does not scale with 1/Sqrt(t))

    Hans-Gnther Moser, MPI fr Physik

  • Radiation Hardness: protons, neutronsgamma, neutron* proton*, irradiations* @ BerkeleyTypefluence ILC years DVthresh gmIleak (pixel)*Gamma913 kRad ~30 ~4V =~100fANeutron2.4x1011 n/cm2~2 0V ~ 1.4 pAProtons3x1012 n/cm2~~35 ~5V -15% 25.9 pA & 280 kRad*unirradiated: ~5-22 fANIEL: increase of leakage current => shot noise

    3x1012 n/cm2 (~ 35 ILC years !): 95e- ENC @ 200C22e- ENC @ 00C

    With Dt = 50 ms (frame rate)

    Hans-Gnther Moser, MPI fr Physik

  • Module Concept & Material Budget

    Innermost Layer:

    One self supporting Si-sensor

    Readout at both ends Sensitive area thinned to 50 mm

    Support frame not thinned (~450 mm)

    Thinned (50 mm) ASIC bump bonded

    Hans-Gnther Moser, MPI fr Physik

  • Thinning Technology at MPI Semiconductor LaboratoryProcess backside of thick detector wafer (structured) implant.2) Bond detector wafer on handle wafer (SOI). 3) Thin detector wafer to desired thickness (grinding & etching).4)Process front side of the detector wafer in a standard (single sided) process line.5) Etch handle wafer.If necessary: add Al-contactsLeave frame for stiffening and handling, if wanted

    Hans-Gnther Moser, MPI fr Physik

  • Thinning : mechanical samples6 wafer with diodes and large mechanical samplesThinned area: 10cm x 1.2 cm (ILC vertex detector dummy)Possibility to structure handling frame(reduce material, keep stiffness)

    Hans-Gnther Moser, MPI fr Physik

  • Mechanical PropertiesBill Cooper, Fermilab

    Hans-Gnther Moser, MPI fr Physik

  • PiN Diodes on thin Silicon 150 .cmCV Curve: depletion at 50 VIV Curve: Irev
  • Actual Projects: Large ILC type structuresAlignment marksin BOX to find thepartial p-implant after bonding Large (10cm x 1.2cm) ILC module like structures, 50 mm thickInstrumented with MOS diodes and strip-like patternsSmaller test diodes and MOS structuresBackside implant like needed for DEPFETs (structured p-implant)Processing of real thinned DEPFETs scheduled for 2008/2009

    Hans-Gnther Moser, MPI fr Physik

  • Material BudgetMaterial budget (within acceptance)

    Sensor:50 mm Si: 0.05% X0Frame:450 mm Si0.05 % X0Switcher: 50 mm Si0.01 % X0Gold bumps:0.03 % X0

    Total:0.12 % X0Frame perforated to reduce material keepingmechanical strengthAll silicon module:Low material budgetMechanical rigidityEasy handlingMinimal CTE effects Single module scale sensor

    Hans-Gnther Moser, MPI fr Physik

  • New Pixel ProductionNew Pixel Production: PXD5

    Larger matrices: 512 x 512 (1.6 x 1.2 cm2)128 x 2048 (0.3 x 4.9 cm2)

    -optimization clear gainlower clear voltages

    variants:small pixels (20x20 mm2)shorter gate -> higher gq

    Test structures for bump bonding

    Ready since June 2007

    First matrices in a lab and beam test

    512 x 512 pixels16.4 x 12.3 mm2 area

    Hans-Gnther Moser, MPI fr Physik

  • Summary and ConclusionsDEPFET pixel detectors for ILC have been designed, simulated and fabricated at the MPI semiconductor laboratory

    Measurements of single pixels demonstrate:charge-current conversion as expected from simulationsfast and complete clearlow noise even at high bandwidth sufficiently radiation tolerant for use at ILC

    All silicon module/ladder concept: based on thinned sensorsthinning technology demonstratedthinned samples/diodes have good mechanical and electrical properties0.1% radiation length per layer in reach

    2nd generation pixel matrices producedlarger (ILC scale) arraysmaller pixel sizeimproved properties (gain, clear behaviour)evaluation in progress

    Hans-Gnther Moser, MPI fr Physik

  • Hans-Gunther Moser

    for the DEPFET Collaboration(www.depfet.org)R G B44, 31, 113R G B120, 101, 213 R G B194, 186, 236

    Hans-Gnther Moser, MPI fr Physik

    Ladislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI MunichLadislav Andricek, MPI Munich