All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

1

Device Modeling Report

Bee Technologies Inc.

COMPONENTS: Power MOSFET (Model Parameters)

PART NUMBER: 2SJ650

MANUFACTURER: SANYO

Body Diode (Model Parameters) / ESD Protection Diode

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2

MOSFET MODEL

PSpice model parameter

Model description

LEVEL

L Channel Length

W Channel Width

KP Transconductance

RS Source Ohmic Resistance

RD Ohmic Drain Resistance

VTO Zero-bias Threshold Voltage

RDS Drain-Source Shunt Resistance

TOX Gate Oxide Thickness

CGSO Zero-bias Gate-Source Capacitance

CGDO Zero-bias Gate-Drain Capacitance

CBD Zero-bias Bulk-Drain Junction Capacitance

MJ Bulk Junction Grading Coefficient

PB Bulk Junction Potential

FC Bulk Junction Forward-bias Capacitance Coefficient

RG Gate Ohmic Resistance

IS Bulk Junction Saturation Current

N Bulk Junction Emission Coefficient

RB Bulk Series Resistance

PHI Surface Inversion Potential

GAMMA Body-effect Parameter

DELTA Width effect on Threshold Voltage

ETA Static Feedback on Threshold Voltage

THETA Mobility Modulation

KAPPA Saturation Field Factor

VMAX Maximum Drift Velocity of Carriers

XJ Metallurgical Junction Depth

UO Surface Mobility

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3

0

5

10

15

0.0 2.0 4.0 6.0 8.0 10.0

gfs

(S)

Drain Current ID (-A)

Measurement

Simulation

Transconductance Characteristic

Circuit Simulation Result

Comparison table

-Id(A) gfs(S)

Error (%) Measurement Simulation

1.0000 3.550 3.707 4.42

2.0000 4.950 5.162 4.28

5.0000 7.800 7.928 1.64

10.0000 10.600 10.862 2.47

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4

V1

0Vdc

V2

-10

0

V3

0Vdc

U12SJ650

V_V1

0V -1.0V -2.0V -3.0V -4.0V -5.0V

I(V3)

0A

-5A

-10A

-15A

-20A

Vgs-Id Characteristic

Circuit Simulation result

Evaluation circuit

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5

Comparison Graph Circuit Simulation Result

Simulation Result

-ID(A) -VGS(V)

Error (%) Measurement Simulation

1 2.650 2.638 -0.47

2 2.850 2.863 0.45

5 3.250 3.320 2.15

10 3.750 3.851 2.69

20 4.700 4.632 -1.46

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

6

U12SJ650

0

V3

0Vdc

VDS

0Vdc

V1

-10

V_VDS

0V -100mV -200mV -300mV -400mV -500mV -600mV

I(V3)

0A

-1.0A

-2.0A

-3.0A

-4.0A

-5.0A

-6.0A

Rds(on) Characteristic

Circuit Simulation result

Evaluation circuit

Simulation Result

ID=-6A, VGS=-10V Measurement Simulation Error (%)

RDS (on) mΩ 100.000 100.000 0.00

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7

Time*1mA

0 5n 10n 15n 20n 25n

V(W1:4)

0V

-1V

-2V

-3V

-4V

-5V

-6V

-7V

-8V

-9V

-10V

Gate Charge Characteristic

Circuit Simulation result

Evaluation circuit

Simulation Result

VDD=-30V,ID=-12A ,VGS=-10V

Measurement Simulation Error (%)

Qgs nC 3.800 3.868 1.79

Qgd nC 4.500 4.480 -0.45

Qg nC 21.000 16.400 -21.90

VDD

-30

I1TD = 0

TF = 5nPW = 600uPER = 1000u

I1 = 0I2 = 1m

TR = 5n

-

+

W1

ION = 0uAIOFF = 1mAW

I212

0

D2Dbreak

U12SJ650

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8

Capacitance Characteristic

Simulation Result

VSD(V) Cbd(pF)

Error(%) Measurement Simulation

0 190.000 190.000 0.000

5 75.000 75.940 1.253

10 54.000 53.680 -0.593

15 43.000 43.153 0.356

20 37.000 36.783 -0.586

25 32.000 32.429 1.341

30 29.000 29.224 0.772

Simulation

Measurement

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9

Time

0.6us 0.7us 0.8us 0.9us 1.0us 1.1us 1.2us 1.3us 1.4us

V(U1:G) V(U1:D)/3

0V

-2V

-4V

-6V

-8V

-10V

-12V

-14V

Switching Time Characteristic

Circuit Simulation result

Evaluation circuit

Simulation Result

ID=-6A, VDD=-30V VGS=0/-10V

Measurement Simulation Error(%)

td(on) ns 10.000 10.012 0.12

U12SJ650

0

VDD-31Vdc

V2TD = 1u

TF = 5nPW = 10uPER = 20u

V1 = 0

TR = 5n

V2 = 20

L2

50nH

R2

50

R1

50

L1

30nH

RL

5

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

10

V2

-5

V1

0

0

V3

0Vdc

U12SJ650

V_V2

0V -0.5V -1.0V -1.5V -2.0V -2.5V -3.0V -3.5V -4.0V -4.5V

I(V3)

0A

-5A

-10A

-15A

-20A

-25A

Output Characteristic

Circuit Simulation result

Evaluation circuit

VGS=-3V

- 4

-6 -10, -8

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

11

U12SJ650

VDS

0

Vsense

0Vdc

V_VDS

0V 0.3V 0.6V 0.9V 1.2V 1.5V

I(Vsense)

100mA

1.0A

10A

100A

BODY DIODE SPICE MODEL Forward Current Characteristic

Circuit Simulation Result

Evaluation Circuit

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

12

0.0

0.1

1.0

10.0

0 0.3 0.6 0.9 1.2 1.5

Dra

in r

evers

e cu

rren

t ID

R (

-A)

Source - Drain voltage VSD (-V)

Measurement

Simulation

Comparison Graph Circuit Simulation Result

Simulation Result

IDR(-A) VSD(-V)

%Error Measurement Simulation

0.01 0.6000 0.5994 -0.10

0.02 0.6200 0.6193 -0.11

0.05 0.6450 0.6461 0.17

0.1 0.6650 0.6670 0.31

0.2 0.6900 0.6893 -0.10

0.5 0.7250 0.7231 -0.26

1 0.7550 0.7551 0.02

2 0.7950 0.7962 0.15

5 0.8700 0.8698 -0.02

10 0.9500 0.9494 -0.06

20 1.0700 1.0703 0.03

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13

U12SJ650

V1

TD = 60ns

TF = 10nsPW = 1usPER = 100us

V1 = -9.4v

TR = 10ns

V2 = 10.6v

R1

50

0

Time

0.6us 0.8us 1.0us 1.2us 1.4us 1.6us

I(R1)

-400mA

-300mA

-200mA

-100mA

-0mA

100mA

200mA

300mA

400mA

Reverse Recovery Characteristic Circuit Simulation Result

Evaluation Circuit

Compare Measurement vs. Simulation

Measurement Simulation Error (%)

trj ns 18.000 18.402 2.23

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Reverse Recovery Characteristic Reference

Trj=18.00(ns) Trb=24.00(ns) Conditions:Ifwd=lrev=0.2(A),Rl=50

Relation between trj and trb

Example

Measurement

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15

R1

0.001m

V1

0Vdc

0

U12SJ650

R2

100MEG

V_V1

0V -10V -20V -30V -40V -50V

I(R1)

0A

-2mA

-4mA

-6mA

-8mA

-10mA

ESD PROTECTION DIODE SPICE MODEL Zener Voltage Characteristic

Circuit Simulation Result

Evaluation Circuit

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

16

Zener Voltage Characteristic Reference